cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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set_memory.h (1869B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright (C) 2019 SiFive
      4 */
      5
      6#ifndef _ASM_RISCV_SET_MEMORY_H
      7#define _ASM_RISCV_SET_MEMORY_H
      8
      9#ifndef __ASSEMBLY__
     10/*
     11 * Functions to change memory attributes.
     12 */
     13#ifdef CONFIG_MMU
     14int set_memory_ro(unsigned long addr, int numpages);
     15int set_memory_rw(unsigned long addr, int numpages);
     16int set_memory_x(unsigned long addr, int numpages);
     17int set_memory_nx(unsigned long addr, int numpages);
     18int set_memory_rw_nx(unsigned long addr, int numpages);
     19static __always_inline int set_kernel_memory(char *startp, char *endp,
     20					     int (*set_memory)(unsigned long start,
     21							       int num_pages))
     22{
     23	unsigned long start = (unsigned long)startp;
     24	unsigned long end = (unsigned long)endp;
     25	int num_pages = PAGE_ALIGN(end - start) >> PAGE_SHIFT;
     26
     27	return set_memory(start, num_pages);
     28}
     29#else
     30static inline int set_memory_ro(unsigned long addr, int numpages) { return 0; }
     31static inline int set_memory_rw(unsigned long addr, int numpages) { return 0; }
     32static inline int set_memory_x(unsigned long addr, int numpages) { return 0; }
     33static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; }
     34static inline int set_memory_rw_nx(unsigned long addr, int numpages) { return 0; }
     35static inline int set_kernel_memory(char *startp, char *endp,
     36				    int (*set_memory)(unsigned long start,
     37						      int num_pages))
     38{
     39	return 0;
     40}
     41#endif
     42
     43int set_direct_map_invalid_noflush(struct page *page);
     44int set_direct_map_default_noflush(struct page *page);
     45bool kernel_page_present(struct page *page);
     46
     47#endif /* __ASSEMBLY__ */
     48
     49#ifdef CONFIG_STRICT_KERNEL_RWX
     50#ifdef CONFIG_64BIT
     51#define SECTION_ALIGN (1 << 21)
     52#else
     53#define SECTION_ALIGN (1 << 22)
     54#endif
     55#else /* !CONFIG_STRICT_KERNEL_RWX */
     56#define SECTION_ALIGN L1_CACHE_BYTES
     57#endif /* CONFIG_STRICT_KERNEL_RWX */
     58
     59#endif /* _ASM_RISCV_SET_MEMORY_H */