nmi.h (3643B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Machine check handler definitions 4 * 5 * Copyright IBM Corp. 2000, 2009 6 * Author(s): Ingo Adlung <adlung@de.ibm.com>, 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 8 * Cornelia Huck <cornelia.huck@de.ibm.com>, 9 */ 10 11#ifndef _ASM_S390_NMI_H 12#define _ASM_S390_NMI_H 13 14#include <linux/bits.h> 15#include <linux/types.h> 16 17#define MCIC_SUBCLASS_MASK (1ULL<<63 | 1ULL<<62 | 1ULL<<61 | \ 18 1ULL<<59 | 1ULL<<58 | 1ULL<<56 | \ 19 1ULL<<55 | 1ULL<<54 | 1ULL<<53 | \ 20 1ULL<<52 | 1ULL<<47 | 1ULL<<46 | \ 21 1ULL<<45 | 1ULL<<44) 22#define MCCK_CODE_SYSTEM_DAMAGE BIT(63) 23#define MCCK_CODE_EXT_DAMAGE BIT(63 - 5) 24#define MCCK_CODE_CP BIT(63 - 9) 25#define MCCK_CODE_STG_ERROR BIT(63 - 16) 26#define MCCK_CODE_STG_KEY_ERROR BIT(63 - 18) 27#define MCCK_CODE_STG_DEGRAD BIT(63 - 19) 28#define MCCK_CODE_PSW_MWP_VALID BIT(63 - 20) 29#define MCCK_CODE_PSW_IA_VALID BIT(63 - 23) 30#define MCCK_CODE_STG_FAIL_ADDR BIT(63 - 24) 31#define MCCK_CODE_CR_VALID BIT(63 - 29) 32#define MCCK_CODE_GS_VALID BIT(63 - 36) 33#define MCCK_CODE_FC_VALID BIT(63 - 43) 34#define MCCK_CODE_CPU_TIMER_VALID BIT(63 - 46) 35 36#ifndef __ASSEMBLY__ 37 38union mci { 39 unsigned long val; 40 struct { 41 u64 sd : 1; /* 00 system damage */ 42 u64 pd : 1; /* 01 instruction-processing damage */ 43 u64 sr : 1; /* 02 system recovery */ 44 u64 : 1; /* 03 */ 45 u64 cd : 1; /* 04 timing-facility damage */ 46 u64 ed : 1; /* 05 external damage */ 47 u64 : 1; /* 06 */ 48 u64 dg : 1; /* 07 degradation */ 49 u64 w : 1; /* 08 warning pending */ 50 u64 cp : 1; /* 09 channel-report pending */ 51 u64 sp : 1; /* 10 service-processor damage */ 52 u64 ck : 1; /* 11 channel-subsystem damage */ 53 u64 : 2; /* 12-13 */ 54 u64 b : 1; /* 14 backed up */ 55 u64 : 1; /* 15 */ 56 u64 se : 1; /* 16 storage error uncorrected */ 57 u64 sc : 1; /* 17 storage error corrected */ 58 u64 ke : 1; /* 18 storage-key error uncorrected */ 59 u64 ds : 1; /* 19 storage degradation */ 60 u64 wp : 1; /* 20 psw mwp validity */ 61 u64 ms : 1; /* 21 psw mask and key validity */ 62 u64 pm : 1; /* 22 psw program mask and cc validity */ 63 u64 ia : 1; /* 23 psw instruction address validity */ 64 u64 fa : 1; /* 24 failing storage address validity */ 65 u64 vr : 1; /* 25 vector register validity */ 66 u64 ec : 1; /* 26 external damage code validity */ 67 u64 fp : 1; /* 27 floating point register validity */ 68 u64 gr : 1; /* 28 general register validity */ 69 u64 cr : 1; /* 29 control register validity */ 70 u64 : 1; /* 30 */ 71 u64 st : 1; /* 31 storage logical validity */ 72 u64 ie : 1; /* 32 indirect storage error */ 73 u64 ar : 1; /* 33 access register validity */ 74 u64 da : 1; /* 34 delayed access exception */ 75 u64 : 1; /* 35 */ 76 u64 gs : 1; /* 36 guarded storage registers validity */ 77 u64 : 5; /* 37-41 */ 78 u64 pr : 1; /* 42 tod programmable register validity */ 79 u64 fc : 1; /* 43 fp control register validity */ 80 u64 ap : 1; /* 44 ancillary report */ 81 u64 : 1; /* 45 */ 82 u64 ct : 1; /* 46 cpu timer validity */ 83 u64 cc : 1; /* 47 clock comparator validity */ 84 u64 : 16; /* 47-63 */ 85 }; 86}; 87 88#define MCESA_ORIGIN_MASK (~0x3ffUL) 89#define MCESA_LC_MASK (0xfUL) 90#define MCESA_MIN_SIZE (1024) 91#define MCESA_MAX_SIZE (2048) 92 93struct mcesa { 94 u8 vector_save_area[1024]; 95 u8 guarded_storage_save_area[32]; 96}; 97 98struct pt_regs; 99 100void nmi_alloc_mcesa_early(u64 *mcesad); 101int nmi_alloc_mcesa(u64 *mcesad); 102void nmi_free_mcesa(u64 *mcesad); 103 104void s390_handle_mcck(struct pt_regs *regs); 105void __s390_handle_mcck(void); 106int s390_do_machine_check(struct pt_regs *regs); 107 108#endif /* __ASSEMBLY__ */ 109#endif /* _ASM_S390_NMI_H */