cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ptrace.h (7480B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 *  S390 version
      4 *    Copyright IBM Corp. 1999, 2000
      5 *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
      6 */
      7#ifndef _S390_PTRACE_H
      8#define _S390_PTRACE_H
      9
     10#include <linux/bits.h>
     11#include <uapi/asm/ptrace.h>
     12#include <asm/tpi.h>
     13
     14#define PIF_SYSCALL			0	/* inside a system call */
     15#define PIF_EXECVE_PGSTE_RESTART	1	/* restart execve for PGSTE binaries */
     16#define PIF_SYSCALL_RET_SET		2	/* return value was set via ptrace */
     17#define PIF_GUEST_FAULT			3	/* indicates program check in sie64a */
     18#define PIF_FTRACE_FULL_REGS		4	/* all register contents valid (ftrace) */
     19
     20#define _PIF_SYSCALL			BIT(PIF_SYSCALL)
     21#define _PIF_EXECVE_PGSTE_RESTART	BIT(PIF_EXECVE_PGSTE_RESTART)
     22#define _PIF_SYSCALL_RET_SET		BIT(PIF_SYSCALL_RET_SET)
     23#define _PIF_GUEST_FAULT		BIT(PIF_GUEST_FAULT)
     24#define _PIF_FTRACE_FULL_REGS		BIT(PIF_FTRACE_FULL_REGS)
     25
     26#ifndef __ASSEMBLY__
     27
     28#define PSW_KERNEL_BITS	(PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
     29			 PSW_MASK_EA | PSW_MASK_BA)
     30#define PSW_USER_BITS	(PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
     31			 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
     32			 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
     33
     34struct psw_bits {
     35	unsigned long	     :	1;
     36	unsigned long per    :	1; /* PER-Mask */
     37	unsigned long	     :	3;
     38	unsigned long dat    :	1; /* DAT Mode */
     39	unsigned long io     :	1; /* Input/Output Mask */
     40	unsigned long ext    :	1; /* External Mask */
     41	unsigned long key    :	4; /* PSW Key */
     42	unsigned long	     :	1;
     43	unsigned long mcheck :	1; /* Machine-Check Mask */
     44	unsigned long wait   :	1; /* Wait State */
     45	unsigned long pstate :	1; /* Problem State */
     46	unsigned long as     :	2; /* Address Space Control */
     47	unsigned long cc     :	2; /* Condition Code */
     48	unsigned long pm     :	4; /* Program Mask */
     49	unsigned long ri     :	1; /* Runtime Instrumentation */
     50	unsigned long	     :	6;
     51	unsigned long eaba   :	2; /* Addressing Mode */
     52	unsigned long	     : 31;
     53	unsigned long ia     : 64; /* Instruction Address */
     54};
     55
     56enum {
     57	PSW_BITS_AMODE_24BIT = 0,
     58	PSW_BITS_AMODE_31BIT = 1,
     59	PSW_BITS_AMODE_64BIT = 3
     60};
     61
     62enum {
     63	PSW_BITS_AS_PRIMARY	= 0,
     64	PSW_BITS_AS_ACCREG	= 1,
     65	PSW_BITS_AS_SECONDARY	= 2,
     66	PSW_BITS_AS_HOME	= 3
     67};
     68
     69#define psw_bits(__psw) (*({			\
     70	typecheck(psw_t, __psw);		\
     71	&(*(struct psw_bits *)(&(__psw)));	\
     72}))
     73
     74#define PSW32_MASK_PER		0x40000000UL
     75#define PSW32_MASK_DAT		0x04000000UL
     76#define PSW32_MASK_IO		0x02000000UL
     77#define PSW32_MASK_EXT		0x01000000UL
     78#define PSW32_MASK_KEY		0x00F00000UL
     79#define PSW32_MASK_BASE		0x00080000UL	/* Always one */
     80#define PSW32_MASK_MCHECK	0x00040000UL
     81#define PSW32_MASK_WAIT		0x00020000UL
     82#define PSW32_MASK_PSTATE	0x00010000UL
     83#define PSW32_MASK_ASC		0x0000C000UL
     84#define PSW32_MASK_CC		0x00003000UL
     85#define PSW32_MASK_PM		0x00000f00UL
     86#define PSW32_MASK_RI		0x00000080UL
     87
     88#define PSW32_ADDR_AMODE	0x80000000UL
     89#define PSW32_ADDR_INSN		0x7FFFFFFFUL
     90
     91#define PSW32_DEFAULT_KEY	(((u32)PAGE_DEFAULT_ACC) << 20)
     92
     93#define PSW32_ASC_PRIMARY	0x00000000UL
     94#define PSW32_ASC_ACCREG	0x00004000UL
     95#define PSW32_ASC_SECONDARY	0x00008000UL
     96#define PSW32_ASC_HOME		0x0000C000UL
     97
     98typedef struct {
     99	unsigned int mask;
    100	unsigned int addr;
    101} psw_t32 __aligned(8);
    102
    103#define PGM_INT_CODE_MASK	0x7f
    104#define PGM_INT_CODE_PER	0x80
    105
    106/*
    107 * The pt_regs struct defines the way the registers are stored on
    108 * the stack during a system call.
    109 */
    110struct pt_regs {
    111	union {
    112		user_pt_regs user_regs;
    113		struct {
    114			unsigned long args[1];
    115			psw_t psw;
    116			unsigned long gprs[NUM_GPRS];
    117		};
    118	};
    119	unsigned long orig_gpr2;
    120	union {
    121		struct {
    122			unsigned int int_code;
    123			unsigned int int_parm;
    124			unsigned long int_parm_long;
    125		};
    126		struct tpi_info tpi_info;
    127	};
    128	unsigned long flags;
    129	unsigned long cr1;
    130	unsigned long last_break;
    131};
    132
    133/*
    134 * Program event recording (PER) register set.
    135 */
    136struct per_regs {
    137	unsigned long control;		/* PER control bits */
    138	unsigned long start;		/* PER starting address */
    139	unsigned long end;		/* PER ending address */
    140};
    141
    142/*
    143 * PER event contains information about the cause of the last PER exception.
    144 */
    145struct per_event {
    146	unsigned short cause;		/* PER code, ATMID and AI */
    147	unsigned long address;		/* PER address */
    148	unsigned char paid;		/* PER access identification */
    149};
    150
    151/*
    152 * Simplified per_info structure used to decode the ptrace user space ABI.
    153 */
    154struct per_struct_kernel {
    155	unsigned long cr9;		/* PER control bits */
    156	unsigned long cr10;		/* PER starting address */
    157	unsigned long cr11;		/* PER ending address */
    158	unsigned long bits;		/* Obsolete software bits */
    159	unsigned long starting_addr;	/* User specified start address */
    160	unsigned long ending_addr;	/* User specified end address */
    161	unsigned short perc_atmid;	/* PER trap ATMID */
    162	unsigned long address;		/* PER trap instruction address */
    163	unsigned char access_id;	/* PER trap access identification */
    164};
    165
    166#define PER_EVENT_MASK			0xEB000000UL
    167
    168#define PER_EVENT_BRANCH		0x80000000UL
    169#define PER_EVENT_IFETCH		0x40000000UL
    170#define PER_EVENT_STORE			0x20000000UL
    171#define PER_EVENT_STORE_REAL		0x08000000UL
    172#define PER_EVENT_TRANSACTION_END	0x02000000UL
    173#define PER_EVENT_NULLIFICATION		0x01000000UL
    174
    175#define PER_CONTROL_MASK		0x00e00000UL
    176
    177#define PER_CONTROL_BRANCH_ADDRESS	0x00800000UL
    178#define PER_CONTROL_SUSPENSION		0x00400000UL
    179#define PER_CONTROL_ALTERATION		0x00200000UL
    180
    181static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
    182{
    183	regs->flags |= (1UL << flag);
    184}
    185
    186static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
    187{
    188	regs->flags &= ~(1UL << flag);
    189}
    190
    191static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
    192{
    193	return !!(regs->flags & (1UL << flag));
    194}
    195
    196static inline int test_and_clear_pt_regs_flag(struct pt_regs *regs, int flag)
    197{
    198	int ret = test_pt_regs_flag(regs, flag);
    199
    200	clear_pt_regs_flag(regs, flag);
    201	return ret;
    202}
    203
    204/*
    205 * These are defined as per linux/ptrace.h, which see.
    206 */
    207#define arch_has_single_step()	(1)
    208#define arch_has_block_step()	(1)
    209
    210#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
    211#define instruction_pointer(regs) ((regs)->psw.addr)
    212#define user_stack_pointer(regs)((regs)->gprs[15])
    213#define profile_pc(regs) instruction_pointer(regs)
    214
    215static inline long regs_return_value(struct pt_regs *regs)
    216{
    217	return regs->gprs[2];
    218}
    219
    220static inline void instruction_pointer_set(struct pt_regs *regs,
    221					   unsigned long val)
    222{
    223	regs->psw.addr = val;
    224}
    225
    226int regs_query_register_offset(const char *name);
    227const char *regs_query_register_name(unsigned int offset);
    228unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
    229unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
    230
    231/**
    232 * regs_get_kernel_argument() - get Nth function argument in kernel
    233 * @regs:	pt_regs of that context
    234 * @n:		function argument number (start from 0)
    235 *
    236 * regs_get_kernel_argument() returns @n th argument of the function call.
    237 */
    238static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs,
    239						     unsigned int n)
    240{
    241	unsigned int argoffset = STACK_FRAME_OVERHEAD / sizeof(long);
    242
    243#define NR_REG_ARGUMENTS 5
    244	if (n < NR_REG_ARGUMENTS)
    245		return regs_get_register(regs, 2 + n);
    246	n -= NR_REG_ARGUMENTS;
    247	return regs_get_kernel_stack_nth(regs, argoffset + n);
    248}
    249
    250static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
    251{
    252	return regs->gprs[15];
    253}
    254
    255static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
    256{
    257	regs->gprs[2] = rc;
    258}
    259
    260#endif /* __ASSEMBLY__ */
    261#endif /* _S390_PTRACE_H */