processor.c (9322B)
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright IBM Corp. 2008 4 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) 5 */ 6 7#define KMSG_COMPONENT "cpu" 8#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 9 10#include <linux/stop_machine.h> 11#include <linux/cpufeature.h> 12#include <linux/bitops.h> 13#include <linux/kernel.h> 14#include <linux/random.h> 15#include <linux/sched/mm.h> 16#include <linux/init.h> 17#include <linux/seq_file.h> 18#include <linux/mm_types.h> 19#include <linux/delay.h> 20#include <linux/cpu.h> 21 22#include <asm/diag.h> 23#include <asm/facility.h> 24#include <asm/elf.h> 25#include <asm/lowcore.h> 26#include <asm/param.h> 27#include <asm/sclp.h> 28#include <asm/smp.h> 29 30unsigned long __read_mostly elf_hwcap; 31char elf_platform[ELF_PLATFORM_SIZE]; 32 33struct cpu_info { 34 unsigned int cpu_mhz_dynamic; 35 unsigned int cpu_mhz_static; 36 struct cpuid cpu_id; 37}; 38 39static DEFINE_PER_CPU(struct cpu_info, cpu_info); 40static DEFINE_PER_CPU(int, cpu_relax_retry); 41 42static bool machine_has_cpu_mhz; 43 44void __init cpu_detect_mhz_feature(void) 45{ 46 if (test_facility(34) && __ecag(ECAG_CPU_ATTRIBUTE, 0) != -1UL) 47 machine_has_cpu_mhz = true; 48} 49 50static void update_cpu_mhz(void *arg) 51{ 52 unsigned long mhz; 53 struct cpu_info *c; 54 55 mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0); 56 c = this_cpu_ptr(&cpu_info); 57 c->cpu_mhz_dynamic = mhz >> 32; 58 c->cpu_mhz_static = mhz & 0xffffffff; 59} 60 61void s390_update_cpu_mhz(void) 62{ 63 s390_adjust_jiffies(); 64 if (machine_has_cpu_mhz) 65 on_each_cpu(update_cpu_mhz, NULL, 0); 66} 67 68void notrace stop_machine_yield(const struct cpumask *cpumask) 69{ 70 int cpu, this_cpu; 71 72 this_cpu = smp_processor_id(); 73 if (__this_cpu_inc_return(cpu_relax_retry) >= spin_retry) { 74 __this_cpu_write(cpu_relax_retry, 0); 75 cpu = cpumask_next_wrap(this_cpu, cpumask, this_cpu, false); 76 if (cpu >= nr_cpu_ids) 77 return; 78 if (arch_vcpu_is_preempted(cpu)) 79 smp_yield_cpu(cpu); 80 } 81} 82 83/* 84 * cpu_init - initializes state that is per-CPU. 85 */ 86void cpu_init(void) 87{ 88 struct cpuid *id = this_cpu_ptr(&cpu_info.cpu_id); 89 90 get_cpu_id(id); 91 if (machine_has_cpu_mhz) 92 update_cpu_mhz(NULL); 93 mmgrab(&init_mm); 94 current->active_mm = &init_mm; 95 BUG_ON(current->mm); 96 enter_lazy_tlb(&init_mm, current); 97} 98 99/* 100 * cpu_have_feature - Test CPU features on module initialization 101 */ 102int cpu_have_feature(unsigned int num) 103{ 104 return elf_hwcap & (1UL << num); 105} 106EXPORT_SYMBOL(cpu_have_feature); 107 108static void show_facilities(struct seq_file *m) 109{ 110 unsigned int bit; 111 112 seq_puts(m, "facilities :"); 113 for_each_set_bit_inv(bit, (long *)&stfle_fac_list, MAX_FACILITY_BIT) 114 seq_printf(m, " %d", bit); 115 seq_putc(m, '\n'); 116} 117 118static void show_cpu_summary(struct seq_file *m, void *v) 119{ 120 static const char *hwcap_str[] = { 121 [HWCAP_NR_ESAN3] = "esan3", 122 [HWCAP_NR_ZARCH] = "zarch", 123 [HWCAP_NR_STFLE] = "stfle", 124 [HWCAP_NR_MSA] = "msa", 125 [HWCAP_NR_LDISP] = "ldisp", 126 [HWCAP_NR_EIMM] = "eimm", 127 [HWCAP_NR_DFP] = "dfp", 128 [HWCAP_NR_HPAGE] = "edat", 129 [HWCAP_NR_ETF3EH] = "etf3eh", 130 [HWCAP_NR_HIGH_GPRS] = "highgprs", 131 [HWCAP_NR_TE] = "te", 132 [HWCAP_NR_VXRS] = "vx", 133 [HWCAP_NR_VXRS_BCD] = "vxd", 134 [HWCAP_NR_VXRS_EXT] = "vxe", 135 [HWCAP_NR_GS] = "gs", 136 [HWCAP_NR_VXRS_EXT2] = "vxe2", 137 [HWCAP_NR_VXRS_PDE] = "vxp", 138 [HWCAP_NR_SORT] = "sort", 139 [HWCAP_NR_DFLT] = "dflt", 140 [HWCAP_NR_VXRS_PDE2] = "vxp2", 141 [HWCAP_NR_NNPA] = "nnpa", 142 [HWCAP_NR_PCI_MIO] = "pcimio", 143 [HWCAP_NR_SIE] = "sie", 144 }; 145 int i, cpu; 146 147 BUILD_BUG_ON(ARRAY_SIZE(hwcap_str) != HWCAP_NR_MAX); 148 seq_printf(m, "vendor_id : IBM/S390\n" 149 "# processors : %i\n" 150 "bogomips per cpu: %lu.%02lu\n", 151 num_online_cpus(), loops_per_jiffy/(500000/HZ), 152 (loops_per_jiffy/(5000/HZ))%100); 153 seq_printf(m, "max thread id : %d\n", smp_cpu_mtid); 154 seq_puts(m, "features\t: "); 155 for (i = 0; i < ARRAY_SIZE(hwcap_str); i++) 156 if (hwcap_str[i] && (elf_hwcap & (1UL << i))) 157 seq_printf(m, "%s ", hwcap_str[i]); 158 seq_puts(m, "\n"); 159 show_facilities(m); 160 show_cacheinfo(m); 161 for_each_online_cpu(cpu) { 162 struct cpuid *id = &per_cpu(cpu_info.cpu_id, cpu); 163 164 seq_printf(m, "processor %d: " 165 "version = %02X, " 166 "identification = %06X, " 167 "machine = %04X\n", 168 cpu, id->version, id->ident, id->machine); 169 } 170} 171 172static int __init setup_hwcaps(void) 173{ 174 /* instructions named N3, "backported" to esa-mode */ 175 elf_hwcap |= HWCAP_ESAN3; 176 177 /* z/Architecture mode active */ 178 elf_hwcap |= HWCAP_ZARCH; 179 180 /* store-facility-list-extended */ 181 if (test_facility(7)) 182 elf_hwcap |= HWCAP_STFLE; 183 184 /* message-security assist */ 185 if (test_facility(17)) 186 elf_hwcap |= HWCAP_MSA; 187 188 /* long-displacement */ 189 if (test_facility(19)) 190 elf_hwcap |= HWCAP_LDISP; 191 192 /* extended-immediate */ 193 elf_hwcap |= HWCAP_EIMM; 194 195 /* extended-translation facility 3 enhancement */ 196 if (test_facility(22) && test_facility(30)) 197 elf_hwcap |= HWCAP_ETF3EH; 198 199 /* decimal floating point & perform floating point operation */ 200 if (test_facility(42) && test_facility(44)) 201 elf_hwcap |= HWCAP_DFP; 202 203 /* huge page support */ 204 if (MACHINE_HAS_EDAT1) 205 elf_hwcap |= HWCAP_HPAGE; 206 207 /* 64-bit register support for 31-bit processes */ 208 elf_hwcap |= HWCAP_HIGH_GPRS; 209 210 /* transactional execution */ 211 if (MACHINE_HAS_TE) 212 elf_hwcap |= HWCAP_TE; 213 214 /* 215 * Vector extension can be disabled with the "novx" parameter. 216 * Use MACHINE_HAS_VX instead of facility bit 129. 217 */ 218 if (MACHINE_HAS_VX) { 219 elf_hwcap |= HWCAP_VXRS; 220 if (test_facility(134)) 221 elf_hwcap |= HWCAP_VXRS_BCD; 222 if (test_facility(135)) 223 elf_hwcap |= HWCAP_VXRS_EXT; 224 if (test_facility(148)) 225 elf_hwcap |= HWCAP_VXRS_EXT2; 226 if (test_facility(152)) 227 elf_hwcap |= HWCAP_VXRS_PDE; 228 if (test_facility(192)) 229 elf_hwcap |= HWCAP_VXRS_PDE2; 230 } 231 232 if (test_facility(150)) 233 elf_hwcap |= HWCAP_SORT; 234 235 if (test_facility(151)) 236 elf_hwcap |= HWCAP_DFLT; 237 238 if (test_facility(165)) 239 elf_hwcap |= HWCAP_NNPA; 240 241 /* guarded storage */ 242 if (MACHINE_HAS_GS) 243 elf_hwcap |= HWCAP_GS; 244 245 if (MACHINE_HAS_PCI_MIO) 246 elf_hwcap |= HWCAP_PCI_MIO; 247 248 /* virtualization support */ 249 if (sclp.has_sief2) 250 elf_hwcap |= HWCAP_SIE; 251 252 return 0; 253} 254arch_initcall(setup_hwcaps); 255 256static int __init setup_elf_platform(void) 257{ 258 struct cpuid cpu_id; 259 260 get_cpu_id(&cpu_id); 261 add_device_randomness(&cpu_id, sizeof(cpu_id)); 262 switch (cpu_id.machine) { 263 default: /* Use "z10" as default. */ 264 strcpy(elf_platform, "z10"); 265 break; 266 case 0x2817: 267 case 0x2818: 268 strcpy(elf_platform, "z196"); 269 break; 270 case 0x2827: 271 case 0x2828: 272 strcpy(elf_platform, "zEC12"); 273 break; 274 case 0x2964: 275 case 0x2965: 276 strcpy(elf_platform, "z13"); 277 break; 278 case 0x3906: 279 case 0x3907: 280 strcpy(elf_platform, "z14"); 281 break; 282 case 0x8561: 283 case 0x8562: 284 strcpy(elf_platform, "z15"); 285 break; 286 case 0x3931: 287 case 0x3932: 288 strcpy(elf_platform, "z16"); 289 break; 290 } 291 return 0; 292} 293arch_initcall(setup_elf_platform); 294 295static void show_cpu_topology(struct seq_file *m, unsigned long n) 296{ 297#ifdef CONFIG_SCHED_TOPOLOGY 298 seq_printf(m, "physical id : %d\n", topology_physical_package_id(n)); 299 seq_printf(m, "core id : %d\n", topology_core_id(n)); 300 seq_printf(m, "book id : %d\n", topology_book_id(n)); 301 seq_printf(m, "drawer id : %d\n", topology_drawer_id(n)); 302 seq_printf(m, "dedicated : %d\n", topology_cpu_dedicated(n)); 303 seq_printf(m, "address : %d\n", smp_cpu_get_cpu_address(n)); 304 seq_printf(m, "siblings : %d\n", cpumask_weight(topology_core_cpumask(n))); 305 seq_printf(m, "cpu cores : %d\n", topology_booted_cores(n)); 306#endif /* CONFIG_SCHED_TOPOLOGY */ 307} 308 309static void show_cpu_ids(struct seq_file *m, unsigned long n) 310{ 311 struct cpuid *id = &per_cpu(cpu_info.cpu_id, n); 312 313 seq_printf(m, "version : %02X\n", id->version); 314 seq_printf(m, "identification : %06X\n", id->ident); 315 seq_printf(m, "machine : %04X\n", id->machine); 316} 317 318static void show_cpu_mhz(struct seq_file *m, unsigned long n) 319{ 320 struct cpu_info *c = per_cpu_ptr(&cpu_info, n); 321 322 if (!machine_has_cpu_mhz) 323 return; 324 seq_printf(m, "cpu MHz dynamic : %d\n", c->cpu_mhz_dynamic); 325 seq_printf(m, "cpu MHz static : %d\n", c->cpu_mhz_static); 326} 327 328/* 329 * show_cpuinfo - Get information on one CPU for use by procfs. 330 */ 331static int show_cpuinfo(struct seq_file *m, void *v) 332{ 333 unsigned long n = (unsigned long) v - 1; 334 unsigned long first = cpumask_first(cpu_online_mask); 335 336 if (n == first) 337 show_cpu_summary(m, v); 338 seq_printf(m, "\ncpu number : %ld\n", n); 339 show_cpu_topology(m, n); 340 show_cpu_ids(m, n); 341 show_cpu_mhz(m, n); 342 return 0; 343} 344 345static inline void *c_update(loff_t *pos) 346{ 347 if (*pos) 348 *pos = cpumask_next(*pos - 1, cpu_online_mask); 349 else 350 *pos = cpumask_first(cpu_online_mask); 351 return *pos < nr_cpu_ids ? (void *)*pos + 1 : NULL; 352} 353 354static void *c_start(struct seq_file *m, loff_t *pos) 355{ 356 cpus_read_lock(); 357 return c_update(pos); 358} 359 360static void *c_next(struct seq_file *m, void *v, loff_t *pos) 361{ 362 ++*pos; 363 return c_update(pos); 364} 365 366static void c_stop(struct seq_file *m, void *v) 367{ 368 cpus_read_unlock(); 369} 370 371const struct seq_operations cpuinfo_op = { 372 .start = c_start, 373 .next = c_next, 374 .stop = c_stop, 375 .show = show_cpuinfo, 376}; 377 378int s390_isolate_bp(void) 379{ 380 if (!test_facility(82)) 381 return -EOPNOTSUPP; 382 set_thread_flag(TIF_ISOLATE_BP); 383 return 0; 384} 385EXPORT_SYMBOL(s390_isolate_bp); 386 387int s390_isolate_bp_guest(void) 388{ 389 if (!test_facility(82)) 390 return -EOPNOTSUPP; 391 set_thread_flag(TIF_ISOLATE_BP_GUEST); 392 return 0; 393} 394EXPORT_SYMBOL(s390_isolate_bp_guest);