cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

reipl.S (1850B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 *    Copyright IBM Corp 2000, 2011
      4 *    Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>,
      5 *		 Denis Joseph Barrow,
      6 */
      7
      8#include <linux/linkage.h>
      9#include <asm/asm-offsets.h>
     10#include <asm/nospec-insn.h>
     11#include <asm/sigp.h>
     12
     13	GEN_BR_THUNK %r9
     14
     15#
     16# Issue "store status" for the current CPU to its prefix page
     17# and call passed function afterwards
     18#
     19# r2 = Function to be called after store status
     20# r3 = Parameter for function
     21#
     22ENTRY(store_status)
     23	/* Save register one and load save area base */
     24	stg	%r1,__LC_SAVE_AREA_RESTART
     25	/* General purpose registers */
     26	lghi	%r1,__LC_GPREGS_SAVE_AREA
     27	stmg	%r0,%r15,0(%r1)
     28	mvc	8(8,%r1),__LC_SAVE_AREA_RESTART
     29	/* Control registers */
     30	lghi	%r1,__LC_CREGS_SAVE_AREA
     31	stctg	%c0,%c15,0(%r1)
     32	/* Access registers */
     33	lghi	%r1,__LC_AREGS_SAVE_AREA
     34	stam	%a0,%a15,0(%r1)
     35	/* Floating point registers */
     36	lghi	%r1,__LC_FPREGS_SAVE_AREA
     37	std	%f0, 0x00(%r1)
     38	std	%f1, 0x08(%r1)
     39	std	%f2, 0x10(%r1)
     40	std	%f3, 0x18(%r1)
     41	std	%f4, 0x20(%r1)
     42	std	%f5, 0x28(%r1)
     43	std	%f6, 0x30(%r1)
     44	std	%f7, 0x38(%r1)
     45	std	%f8, 0x40(%r1)
     46	std	%f9, 0x48(%r1)
     47	std	%f10,0x50(%r1)
     48	std	%f11,0x58(%r1)
     49	std	%f12,0x60(%r1)
     50	std	%f13,0x68(%r1)
     51	std	%f14,0x70(%r1)
     52	std	%f15,0x78(%r1)
     53	/* Floating point control register */
     54	lghi	%r1,__LC_FP_CREG_SAVE_AREA
     55	stfpc	0(%r1)
     56	/* CPU timer */
     57	lghi	%r1,__LC_CPU_TIMER_SAVE_AREA
     58	stpt	0(%r1)
     59	/* Store prefix register */
     60	lghi	%r1,__LC_PREFIX_SAVE_AREA
     61	stpx	0(%r1)
     62	/* Clock comparator - seven bytes */
     63	lghi	%r1,__LC_CLOCK_COMP_SAVE_AREA
     64	larl	%r4,.Lclkcmp
     65	stckc	0(%r4)
     66	mvc	1(7,%r1),1(%r4)
     67	/* Program status word */
     68	lghi	%r1,__LC_PSW_SAVE_AREA
     69	epsw	%r4,%r5
     70	st	%r4,0(%r1)
     71	st	%r5,4(%r1)
     72	stg	%r2,8(%r1)
     73	lgr	%r9,%r2
     74	lgr	%r2,%r3
     75	BR_EX	%r9
     76ENDPROC(store_status)
     77
     78	.section .bss
     79	.align	8
     80.Lclkcmp:	.quad	0x0000000000000000
     81	.previous