cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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board-apsh4ad0a.c (3267B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * ALPHAPROJECT AP-SH4AD-0A Support.
      4 *
      5 * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
      6 * Copyright (C) 2010  Matt Fleming
      7 * Copyright (C) 2010  Paul Mundt
      8 */
      9#include <linux/init.h>
     10#include <linux/platform_device.h>
     11#include <linux/io.h>
     12#include <linux/regulator/fixed.h>
     13#include <linux/regulator/machine.h>
     14#include <linux/smsc911x.h>
     15#include <linux/irq.h>
     16#include <linux/clk.h>
     17#include <asm/machvec.h>
     18#include <linux/sizes.h>
     19
     20/* Dummy supplies, where voltage doesn't matter */
     21static struct regulator_consumer_supply dummy_supplies[] = {
     22	REGULATOR_SUPPLY("vddvario", "smsc911x"),
     23	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
     24};
     25
     26static struct resource smsc911x_resources[] = {
     27	[0] = {
     28		.name		= "smsc911x-memory",
     29		.start		= 0xA4000000,
     30		.end		= 0xA4000000 + SZ_256 - 1,
     31		.flags		= IORESOURCE_MEM,
     32	},
     33	[1] = {
     34		.name		= "smsc911x-irq",
     35		.start		= evt2irq(0x200),
     36		.end		= evt2irq(0x200),
     37		.flags		= IORESOURCE_IRQ,
     38	},
     39};
     40
     41static struct smsc911x_platform_config smsc911x_config = {
     42	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
     43	.irq_type	= SMSC911X_IRQ_TYPE_OPEN_DRAIN,
     44	.flags		= SMSC911X_USE_16BIT,
     45	.phy_interface	= PHY_INTERFACE_MODE_MII,
     46};
     47
     48static struct platform_device smsc911x_device = {
     49	.name		= "smsc911x",
     50	.id		= -1,
     51	.num_resources	= ARRAY_SIZE(smsc911x_resources),
     52	.resource	= smsc911x_resources,
     53	.dev = {
     54		.platform_data = &smsc911x_config,
     55	},
     56};
     57
     58static struct platform_device *apsh4ad0a_devices[] __initdata = {
     59	&smsc911x_device,
     60};
     61
     62static int __init apsh4ad0a_devices_setup(void)
     63{
     64	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
     65
     66	return platform_add_devices(apsh4ad0a_devices,
     67				    ARRAY_SIZE(apsh4ad0a_devices));
     68}
     69device_initcall(apsh4ad0a_devices_setup);
     70
     71static int apsh4ad0a_mode_pins(void)
     72{
     73	int value = 0;
     74
     75	/* These are the factory default settings of SW1 and SW2.
     76	 * If you change these dip switches then you will need to
     77	 * adjust the values below as well.
     78	 */
     79	value |=  MODE_PIN0;  /* Clock Mode 3 */
     80	value |=  MODE_PIN1;
     81	value &= ~MODE_PIN2;
     82	value &= ~MODE_PIN3;
     83	value &= ~MODE_PIN4;  /* 16-bit Area0 bus width  */
     84	value |=  MODE_PIN5;
     85	value |=  MODE_PIN6;
     86	value |=  MODE_PIN7;  /* Normal mode */
     87	value |=  MODE_PIN8;  /* Little Endian */
     88	value |=  MODE_PIN9;  /* Crystal resonator */
     89	value &= ~MODE_PIN10; /* 29-bit address mode */
     90	value &= ~MODE_PIN11; /* PCI-E Root port */
     91	value &= ~MODE_PIN12; /* 4 lane + 1 lane */
     92	value |=  MODE_PIN13; /* AUD Enable */
     93	value &= ~MODE_PIN14; /* Normal Operation */
     94
     95	return value;
     96}
     97
     98static int apsh4ad0a_clk_init(void)
     99{
    100	struct clk *clk;
    101	int ret;
    102
    103	clk = clk_get(NULL, "extal");
    104	if (IS_ERR(clk))
    105		return PTR_ERR(clk);
    106	ret = clk_set_rate(clk, 33333000);
    107	clk_put(clk);
    108
    109	return ret;
    110}
    111
    112/* Initialize the board */
    113static void __init apsh4ad0a_setup(char **cmdline_p)
    114{
    115	pr_info("Alpha Project AP-SH4AD-0A support:\n");
    116}
    117
    118static void __init apsh4ad0a_init_irq(void)
    119{
    120	plat_irq_setup_pins(IRQ_MODE_IRQ3210);
    121}
    122
    123/*
    124 * The Machine Vector
    125 */
    126static struct sh_machine_vector mv_apsh4ad0a __initmv = {
    127	.mv_name		= "AP-SH4AD-0A",
    128	.mv_setup		= apsh4ad0a_setup,
    129	.mv_mode_pins		= apsh4ad0a_mode_pins,
    130	.mv_clk_init		= apsh4ad0a_clk_init,
    131	.mv_init_irq		= apsh4ad0a_init_irq,
    132};