cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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setup.c (2286B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * linux/arch/sh/boards/sh03/setup.c
      4 *
      5 * Copyright (C) 2004  Interface Co.,Ltd. Saito.K
      6 *
      7 */
      8
      9#include <linux/init.h>
     10#include <linux/irq.h>
     11#include <linux/pci.h>
     12#include <linux/platform_device.h>
     13#include <linux/ata_platform.h>
     14#include <asm/io.h>
     15#include <asm/rtc.h>
     16#include <mach-sh03/mach/io.h>
     17#include <mach-sh03/mach/sh03.h>
     18#include <asm/addrspace.h>
     19
     20static void __init init_sh03_IRQ(void)
     21{
     22	plat_irq_setup_pins(IRQ_MODE_IRQ);
     23}
     24
     25static struct resource cf_ide_resources[] = {
     26	[0] = {
     27		.start  = 0x1f0,
     28		.end    = 0x1f0 + 8,
     29		.flags  = IORESOURCE_IO,
     30	},
     31	[1] = {
     32		.start  = 0x1f0 + 0x206,
     33		.end    = 0x1f0 +8 + 0x206 + 8,
     34		.flags  = IORESOURCE_IO,
     35	},
     36	[2] = {
     37		.start  = IRL2_IRQ,
     38		.flags  = IORESOURCE_IRQ,
     39	},
     40};
     41
     42static struct platform_device cf_ide_device = {
     43	.name		= "pata_platform",
     44	.id		= -1,
     45	.num_resources	= ARRAY_SIZE(cf_ide_resources),
     46	.resource	= cf_ide_resources,
     47};
     48
     49static struct resource heartbeat_resources[] = {
     50	[0] = {
     51		.start	= 0xa0800000,
     52		.end	= 0xa0800000,
     53		.flags	= IORESOURCE_MEM,
     54	},
     55};
     56
     57static struct platform_device heartbeat_device = {
     58	.name		= "heartbeat",
     59	.id		= -1,
     60	.num_resources	= ARRAY_SIZE(heartbeat_resources),
     61	.resource	= heartbeat_resources,
     62};
     63
     64static struct platform_device *sh03_devices[] __initdata = {
     65	&heartbeat_device,
     66	&cf_ide_device,
     67};
     68
     69static int __init sh03_devices_setup(void)
     70{
     71	pgprot_t prot;
     72	unsigned long paddrbase;
     73	void *cf_ide_base;
     74
     75	/* open I/O area window */
     76	paddrbase = virt_to_phys((void *)PA_AREA5_IO);
     77	prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
     78	cf_ide_base = ioremap_prot(paddrbase, PAGE_SIZE, pgprot_val(prot));
     79	if (!cf_ide_base) {
     80		printk("allocate_cf_area : can't open CF I/O window!\n");
     81		return -ENOMEM;
     82	}
     83
     84	/* IDE cmd address : 0x1f0-0x1f7 and 0x3f6 */
     85	cf_ide_resources[0].start += (unsigned long)cf_ide_base;
     86	cf_ide_resources[0].end   += (unsigned long)cf_ide_base;
     87	cf_ide_resources[1].start += (unsigned long)cf_ide_base;
     88	cf_ide_resources[1].end   += (unsigned long)cf_ide_base;
     89
     90	return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices));
     91}
     92device_initcall(sh03_devices_setup);
     93
     94static struct sh_machine_vector mv_sh03 __initmv = {
     95	.mv_name		= "Interface (CTP/PCI-SH03)",
     96	.mv_init_irq		= init_sh03_IRQ,
     97};