cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

irq.c (979B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * linux/arch/sh/boards/renesas/sh7763rdp/irq.c
      4 *
      5 * Renesas Solutions SH7763RDP Support.
      6 *
      7 * Copyright (C) 2008 Renesas Solutions Corp.
      8 * Copyright (C) 2008  Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
      9 */
     10
     11#include <linux/init.h>
     12#include <linux/irq.h>
     13#include <asm/io.h>
     14#include <asm/irq.h>
     15#include <mach/sh7763rdp.h>
     16
     17#define INTC_BASE		(0xFFD00000)
     18#define INTC_INT2PRI7   (INTC_BASE+0x4001C)
     19#define INTC_INT2MSKCR	(INTC_BASE+0x4003C)
     20#define INTC_INT2MSKCR1	(INTC_BASE+0x400D4)
     21
     22/*
     23 * Initialize IRQ setting
     24 */
     25void __init init_sh7763rdp_IRQ(void)
     26{
     27	/* GPIO enabled */
     28	__raw_writel(1 << 25, INTC_INT2MSKCR);
     29
     30	/* enable GPIO interrupts */
     31	__raw_writel((__raw_readl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000,
     32		  INTC_INT2PRI7);
     33
     34	/* USBH enabled */
     35	__raw_writel(1 << 17, INTC_INT2MSKCR1);
     36
     37	/* GETHER enabled */
     38	__raw_writel(1 << 16, INTC_INT2MSKCR1);
     39
     40	/* DMAC enabled */
     41	__raw_writel(1 << 8, INTC_INT2MSKCR);
     42}