cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fixups-dreamcast.c (2413B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * arch/sh/drivers/pci/fixups-dreamcast.c
      4 *
      5 * PCI fixups for the Sega Dreamcast
      6 *
      7 * Copyright (C) 2001, 2002  M. R. Brown
      8 * Copyright (C) 2002, 2003, 2006  Paul Mundt
      9 *
     10 * This file originally bore the message (with enclosed-$):
     11 *	Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp
     12 *	Dreamcast PCI: Supports SEGA Broadband Adaptor only.
     13 */
     14
     15#include <linux/sched.h>
     16#include <linux/kernel.h>
     17#include <linux/param.h>
     18#include <linux/interrupt.h>
     19#include <linux/init.h>
     20#include <linux/irq.h>
     21#include <linux/pci.h>
     22#include <linux/dma-map-ops.h>
     23
     24#include <asm/io.h>
     25#include <asm/irq.h>
     26#include <mach/pci.h>
     27
     28static void gapspci_fixup_resources(struct pci_dev *dev)
     29{
     30	struct pci_channel *p = dev->sysdata;
     31	struct resource res;
     32	struct pci_bus_region region;
     33
     34	printk(KERN_NOTICE "PCI: Fixing up device %s\n", pci_name(dev));
     35
     36	switch (dev->device) {
     37	case PCI_DEVICE_ID_SEGA_BBA:
     38		/*
     39		 * We also assume that dev->devfn == 0
     40		 */
     41		dev->resource[1].start	= p->resources[0].start  + 0x100;
     42		dev->resource[1].end	= dev->resource[1].start + 0x200 - 1;
     43
     44		/*
     45		 * This is not a normal BAR, prevent any attempts to move
     46		 * the BAR, as this will result in a bus lock.
     47		 */
     48		dev->resource[1].flags |= IORESOURCE_PCI_FIXED;
     49
     50		/*
     51		 * Redirect dma memory allocations to special memory window.
     52		 *
     53		 * If this GAPSPCI region were mapped by a BAR, the CPU
     54		 * phys_addr_t would be pci_resource_start(), and the bus
     55		 * address would be pci_bus_address(pci_resource_start()).
     56		 * But apparently there's no BAR mapping it, so we just
     57		 * "know" its CPU address is GAPSPCI_DMA_BASE.
     58		 */
     59		res.start = GAPSPCI_DMA_BASE;
     60		res.end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1;
     61		res.flags = IORESOURCE_MEM;
     62		pcibios_resource_to_bus(dev->bus, &region, &res);
     63		BUG_ON(dma_declare_coherent_memory(&dev->dev,
     64						res.start,
     65						region.start,
     66						resource_size(&res)));
     67		break;
     68	default:
     69		printk("PCI: Failed resource fixup\n");
     70	}
     71}
     72DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, gapspci_fixup_resources);
     73
     74int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
     75{
     76	/*
     77	 * The interrupt routing semantics here are quite trivial.
     78	 *
     79	 * We basically only support one interrupt, so we only bother
     80	 * updating a device's interrupt line with this single shared
     81	 * interrupt. Keeps routing quite simple, doesn't it?
     82	 */
     83	return GAPSPCI_IRQ;
     84}