cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ops-dreamcast.c (2501B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * PCI operations for the Sega Dreamcast
      4 *
      5 * Copyright (C) 2001, 2002  M. R. Brown
      6 * Copyright (C) 2002, 2003  Paul Mundt
      7 */
      8
      9#include <linux/sched.h>
     10#include <linux/kernel.h>
     11#include <linux/param.h>
     12#include <linux/interrupt.h>
     13#include <linux/init.h>
     14#include <linux/irq.h>
     15#include <linux/pci.h>
     16#include <linux/module.h>
     17#include <linux/io.h>
     18#include <mach/pci.h>
     19
     20/*
     21 * The !gapspci_config_access case really shouldn't happen, ever, unless
     22 * someone implicitly messes around with the last devfn value.. otherwise we
     23 * only support a single device anyways, and if we didn't have a BBA, we
     24 * wouldn't make it terribly far through the PCI setup anyways.
     25 *
     26 * Also, we could very easily support both Type 0 and Type 1 configurations
     27 * here, but since it doesn't seem that there is any such implementation in
     28 * existence, we don't bother.
     29 *
     30 * I suppose if someone actually gets around to ripping the chip out of
     31 * the BBA and hanging some more devices off of it, then this might be
     32 * something to take into consideration. However, due to the cost of the BBA,
     33 * and the general lack of activity by DC hardware hackers, this doesn't seem
     34 * likely to happen anytime soon.
     35 */
     36static int gapspci_config_access(unsigned char bus, unsigned int devfn)
     37{
     38	return (bus == 0) && (devfn == 0);
     39}
     40
     41/*
     42 * We can also actually read and write in b/w/l sizes! Thankfully this part
     43 * was at least done right, and we don't have to do the stupid masking and
     44 * shifting that we do on the 7751! Small wonders never cease to amaze.
     45 */
     46static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
     47{
     48	*val = 0xffffffff;
     49
     50	if (!gapspci_config_access(bus->number, devfn))
     51		return PCIBIOS_DEVICE_NOT_FOUND;
     52
     53	switch (size) {
     54	case 1: *val = inb(GAPSPCI_BBA_CONFIG+where); break;
     55	case 2: *val = inw(GAPSPCI_BBA_CONFIG+where); break;
     56	case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break;
     57	}
     58
     59        return PCIBIOS_SUCCESSFUL;
     60}
     61
     62static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
     63{
     64	if (!gapspci_config_access(bus->number, devfn))
     65		return PCIBIOS_DEVICE_NOT_FOUND;
     66
     67	switch (size) {
     68	case 1: outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break;
     69	case 2: outw((u16)val, GAPSPCI_BBA_CONFIG+where); break;
     70	case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
     71	}
     72
     73        return PCIBIOS_SUCCESSFUL;
     74}
     75
     76struct pci_ops gapspci_pci_ops = {
     77	.read	= gapspci_read,
     78	.write	= gapspci_write,
     79};