cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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string_32.h (2208B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef __ASM_SH_STRING_H
      3#define __ASM_SH_STRING_H
      4
      5/*
      6 * Copyright (C) 1999 Niibe Yutaka
      7 * But consider these trivial functions to be public domain.
      8 */
      9
     10#define __HAVE_ARCH_STRCPY
     11static inline char *strcpy(char *__dest, const char *__src)
     12{
     13	register char *__xdest = __dest;
     14	unsigned long __dummy;
     15
     16	__asm__ __volatile__("1:\n\t"
     17			     "mov.b	@%1+, %2\n\t"
     18			     "mov.b	%2, @%0\n\t"
     19			     "cmp/eq	#0, %2\n\t"
     20			     "bf/s	1b\n\t"
     21			     " add	#1, %0\n\t"
     22			     : "=r" (__dest), "=r" (__src), "=&z" (__dummy)
     23			     : "0" (__dest), "1" (__src)
     24			     : "memory", "t");
     25
     26	return __xdest;
     27}
     28
     29#define __HAVE_ARCH_STRCMP
     30static inline int strcmp(const char *__cs, const char *__ct)
     31{
     32	register int __res;
     33	unsigned long __dummy;
     34
     35	__asm__ __volatile__(
     36		"mov.b	@%1+, %3\n"
     37		"1:\n\t"
     38		"mov.b	@%0+, %2\n\t"
     39		"cmp/eq #0, %3\n\t"
     40		"bt	2f\n\t"
     41		"cmp/eq %2, %3\n\t"
     42		"bt/s	1b\n\t"
     43		" mov.b	@%1+, %3\n\t"
     44		"add	#-2, %1\n\t"
     45		"mov.b	@%1, %3\n\t"
     46		"sub	%3, %2\n"
     47		"2:"
     48		: "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy)
     49		: "0" (__cs), "1" (__ct)
     50		: "t");
     51
     52	return __res;
     53}
     54
     55#define __HAVE_ARCH_STRNCMP
     56static inline int strncmp(const char *__cs, const char *__ct, size_t __n)
     57{
     58	register int __res;
     59	unsigned long __dummy;
     60
     61	if (__n == 0)
     62		return 0;
     63
     64	__asm__ __volatile__(
     65		"mov.b	@%1+, %3\n"
     66		"1:\n\t"
     67		"mov.b	@%0+, %2\n\t"
     68		"cmp/eq %6, %0\n\t"
     69		"bt/s	2f\n\t"
     70		" cmp/eq #0, %3\n\t"
     71		"bt/s	3f\n\t"
     72		" cmp/eq %3, %2\n\t"
     73		"bt/s	1b\n\t"
     74		" mov.b	@%1+, %3\n\t"
     75		"add	#-2, %1\n\t"
     76		"mov.b	@%1, %3\n"
     77		"2:\n\t"
     78		"sub	%3, %2\n"
     79		"3:"
     80		:"=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy)
     81		: "0" (__cs), "1" (__ct), "r" (__cs+__n)
     82		: "t");
     83
     84	return __res;
     85}
     86
     87#define __HAVE_ARCH_MEMSET
     88extern void *memset(void *__s, int __c, size_t __count);
     89
     90#define __HAVE_ARCH_MEMCPY
     91extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
     92
     93#define __HAVE_ARCH_MEMMOVE
     94extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
     95
     96#define __HAVE_ARCH_MEMCHR
     97extern void *memchr(const void *__s, int __c, size_t __n);
     98
     99#define __HAVE_ARCH_STRLEN
    100extern size_t strlen(const char *);
    101
    102#endif /* __ASM_SH_STRING_H */