cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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traps_32.h (1338B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef __ASM_SH_TRAPS_32_H
      3#define __ASM_SH_TRAPS_32_H
      4
      5#include <linux/types.h>
      6#include <asm/mmu.h>
      7
      8#ifdef CONFIG_CPU_HAS_SR_RB
      9#define lookup_exception_vector()	\
     10({					\
     11	unsigned long _vec;		\
     12					\
     13	__asm__ __volatile__ (		\
     14		"stc r2_bank, %0\n\t"	\
     15		: "=r" (_vec)		\
     16	);				\
     17					\
     18	_vec;				\
     19})
     20#else
     21#define lookup_exception_vector()	\
     22({					\
     23	unsigned long _vec;		\
     24	__asm__ __volatile__ (		\
     25		"mov r4, %0\n\t"	\
     26		: "=r" (_vec)		\
     27	);				\
     28					\
     29	_vec;				\
     30})
     31#endif
     32
     33static inline void trigger_address_error(void)
     34{
     35	__asm__ __volatile__ (
     36		"ldc %0, sr\n\t"
     37		"mov.l @%1, %0"
     38		:
     39		: "r" (0x10000000), "r" (0x80000001)
     40	);
     41}
     42
     43asmlinkage void do_address_error(struct pt_regs *regs,
     44				 unsigned long writeaccess,
     45				 unsigned long address);
     46asmlinkage void do_divide_error(unsigned long r4);
     47asmlinkage void do_reserved_inst(void);
     48asmlinkage void do_illegal_slot_inst(void);
     49asmlinkage void do_exception_error(void);
     50
     51#define BUILD_TRAP_HANDLER(name)					\
     52asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5,	\
     53				    unsigned long r6, unsigned long r7,	\
     54				    struct pt_regs __regs)
     55
     56#define TRAP_HANDLER_DECL				\
     57	struct pt_regs *regs = RELOC_HIDE(&__regs, 0);	\
     58	unsigned int vec = regs->tra;			\
     59	(void)vec;
     60
     61#endif /* __ASM_SH_TRAPS_32_H */