gpio.h (2108B)
1/* SPDX-License-Identifier: GPL-2.0 2 * 3 * include/asm-sh/cpu-sh3/gpio.h 4 * 5 * Copyright (C) 2007 Markus Brunner, Mark Jonas 6 * 7 * Addresses for the Pin Function Controller 8 */ 9#ifndef _CPU_SH3_GPIO_H 10#define _CPU_SH3_GPIO_H 11 12#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 13 defined(CONFIG_CPU_SUBTYPE_SH7721) 14 15/* Control registers */ 16#define PORT_PACR 0xA4050100UL 17#define PORT_PBCR 0xA4050102UL 18#define PORT_PCCR 0xA4050104UL 19#define PORT_PDCR 0xA4050106UL 20#define PORT_PECR 0xA4050108UL 21#define PORT_PFCR 0xA405010AUL 22#define PORT_PGCR 0xA405010CUL 23#define PORT_PHCR 0xA405010EUL 24#define PORT_PJCR 0xA4050110UL 25#define PORT_PKCR 0xA4050112UL 26#define PORT_PLCR 0xA4050114UL 27#define PORT_PMCR 0xA4050116UL 28#define PORT_PPCR 0xA4050118UL 29#define PORT_PRCR 0xA405011AUL 30#define PORT_PSCR 0xA405011CUL 31#define PORT_PTCR 0xA405011EUL 32#define PORT_PUCR 0xA4050120UL 33#define PORT_PVCR 0xA4050122UL 34 35/* Data registers */ 36#define PORT_PADR 0xA4050140UL 37/* Address of PORT_PBDR is wrong in the datasheet, see errata 2005-09-21 */ 38#define PORT_PBDR 0xA4050142UL 39#define PORT_PCDR 0xA4050144UL 40#define PORT_PDDR 0xA4050146UL 41#define PORT_PEDR 0xA4050148UL 42#define PORT_PFDR 0xA405014AUL 43#define PORT_PGDR 0xA405014CUL 44#define PORT_PHDR 0xA405014EUL 45#define PORT_PJDR 0xA4050150UL 46#define PORT_PKDR 0xA4050152UL 47#define PORT_PLDR 0xA4050154UL 48#define PORT_PMDR 0xA4050156UL 49#define PORT_PPDR 0xA4050158UL 50#define PORT_PRDR 0xA405015AUL 51#define PORT_PSDR 0xA405015CUL 52#define PORT_PTDR 0xA405015EUL 53#define PORT_PUDR 0xA4050160UL 54#define PORT_PVDR 0xA4050162UL 55 56/* Pin Select Registers */ 57#define PORT_PSELA 0xA4050124UL 58#define PORT_PSELB 0xA4050126UL 59#define PORT_PSELC 0xA4050128UL 60#define PORT_PSELD 0xA405012AUL 61 62#elif defined(CONFIG_CPU_SUBTYPE_SH7709) 63 64/* Control registers */ 65#define PORT_PACR 0xa4000100UL 66#define PORT_PBCR 0xa4000102UL 67#define PORT_PCCR 0xa4000104UL 68#define PORT_PFCR 0xa400010aUL 69 70/* Data registers */ 71#define PORT_PADR 0xa4000120UL 72#define PORT_PBDR 0xa4000122UL 73#define PORT_PCDR 0xa4000124UL 74#define PORT_PFDR 0xa400012aUL 75 76#endif 77 78#endif