microdev.h (3283B)
1/* SPDX-License-Identifier: GPL-2.0 2 * 3 * linux/include/asm-sh/microdev.h 4 * 5 * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) 6 * 7 * Definitions for the SuperH SH4-202 MicroDev board. 8 */ 9#ifndef __ASM_SH_MICRODEV_H 10#define __ASM_SH_MICRODEV_H 11 12extern void init_microdev_irq(void); 13extern void microdev_print_fpga_intc_status(void); 14 15/* 16 * The following are useful macros for manipulating the interrupt 17 * controller (INTC) on the CPU-board FPGA. should be noted that there 18 * is an INTC on the FPGA, and a separate INTC on the SH4-202 core - 19 * these are two different things, both of which need to be prorammed to 20 * correctly route - unfortunately, they have the same name and 21 * abbreviations! 22 */ 23#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */ 24#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */ 25#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */ 26#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */ 27#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */ 28#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */ 29#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */ 30#define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */ 31#define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */ 32 33 34/* 35 * The following are the IRQ numbers for the Linux Kernel for external 36 * interrupts. i.e. the numbers seen by 'cat /proc/interrupt'. 37 */ 38#define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ 39#define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */ 40#define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */ 41#define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ 42#define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */ 43#define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ 44#define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */ 45#define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */ 46 47/* 48 * The following are the IRQ numbers for the INTC on the FPGA for 49 * external interrupts. i.e. the bits in the INTC registers in the 50 * FPGA. 51 */ 52#define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ 53#define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */ 54#define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ 55#define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ 56#define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */ 57#define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */ 58#define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */ 59#define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */ 60 61#define MICRODEV_IRQ_PCI_INTA 8 62#define MICRODEV_IRQ_PCI_INTB 9 63#define MICRODEV_IRQ_PCI_INTC 10 64#define MICRODEV_IRQ_PCI_INTD 11 65 66#define __IO_PREFIX microdev 67#include <asm/io_generic.h> 68 69#endif /* __ASM_SH_MICRODEV_H */