cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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romimage.h (1067B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifdef __ASSEMBLY__
      3
      4/* EcoVec board specific boot code:
      5 * converts the "partner-jet-script.txt" script into assembly
      6 * the assembly code is the first code to be executed in the romImage
      7 */
      8
      9#include <asm/romimage-macros.h>
     10#include <mach/partner-jet-setup.txt>
     11
     12	/* execute icbi after enabling cache */
     13	mov.l	1f, r0
     14	icbi	@r0
     15
     16	/* jump to cached area */
     17	mova	2f, r0
     18	jmp	@r0
     19	nop
     20
     21	.align 2
     221 :	.long 0xa8000000
     232 :
     24
     25#else /* __ASSEMBLY__ */
     26
     27/* Ecovec board specific information:
     28 *
     29 * Set the following to enable MMCIF boot from the MMC card in CN12:
     30 *
     31 * DS1.5 = OFF (SH BOOT pin set to L)
     32 * DS2.6 = OFF (Select MMCIF on CN12 instead of SDHI1)
     33 * DS2.7 = ON  (Select MMCIF on CN12 instead of SDHI1)
     34 *
     35 */
     36#define HIZCRA		0xa4050158
     37#define PGDR		0xa405012c
     38
     39static inline void mmcif_update_progress(int nr)
     40{
     41	/* disable Hi-Z for LED pins */
     42	__raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA);
     43
     44	/* update progress on LED4, LED5, LED6 and LED7 */
     45	__raw_writeb(1 << (nr - 1), PGDR);
     46}
     47
     48#endif /* __ASSEMBLY__ */