cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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se7724.h (1682B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef __ASM_SH_SE7724_H
      3#define __ASM_SH_SE7724_H
      4
      5/*
      6 * linux/include/asm-sh/se7724.h
      7 *
      8 * Copyright (C) 2009 Renesas Solutions Corp.
      9 *
     10 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
     11 *
     12 * Hitachi UL SolutionEngine 7724 Support.
     13 *
     14 * Based on se7722.h
     15 * Copyright (C) 2007  Nobuhiro Iwamatsu
     16 */
     17#include <linux/sh_intc.h>
     18#include <asm/addrspace.h>
     19
     20/* SH Eth */
     21#define SH_ETH_ADDR	(0xA4600000)
     22#define SH_ETH_MAHR	(SH_ETH_ADDR + 0x1C0)
     23#define SH_ETH_MALR	(SH_ETH_ADDR + 0x1C8)
     24
     25#define PA_LED		(0xba203000)	/* 8bit LED */
     26#define IRQ_MODE	(0xba200010)
     27#define IRQ0_SR		(0xba200014)
     28#define IRQ1_SR		(0xba200018)
     29#define IRQ2_SR		(0xba20001c)
     30#define IRQ0_MR		(0xba200020)
     31#define IRQ1_MR		(0xba200024)
     32#define IRQ2_MR		(0xba200028)
     33
     34/* IRQ */
     35#define IRQ0_IRQ        evt2irq(0x600)
     36#define IRQ1_IRQ        evt2irq(0x620)
     37#define IRQ2_IRQ        evt2irq(0x640)
     38
     39/* Bits in IRQ012 registers */
     40#define SE7724_FPGA_IRQ_BASE	220
     41
     42/* IRQ0 */
     43#define IRQ0_BASE	SE7724_FPGA_IRQ_BASE
     44#define IRQ0_KEY	(IRQ0_BASE + 12)
     45#define IRQ0_RMII	(IRQ0_BASE + 13)
     46#define IRQ0_SMC	(IRQ0_BASE + 14)
     47#define IRQ0_MASK	0x7fff
     48#define IRQ0_END	IRQ0_SMC
     49/* IRQ1 */
     50#define IRQ1_BASE	(IRQ0_END + 1)
     51#define IRQ1_TS		(IRQ1_BASE + 0)
     52#define IRQ1_MASK	0x0001
     53#define IRQ1_END	IRQ1_TS
     54/* IRQ2 */
     55#define IRQ2_BASE	(IRQ1_END + 1)
     56#define IRQ2_USB0	(IRQ1_BASE + 0)
     57#define IRQ2_USB1	(IRQ1_BASE + 1)
     58#define IRQ2_MASK	0x0003
     59#define IRQ2_END	IRQ2_USB1
     60
     61#define SE7724_FPGA_IRQ_NR	(IRQ2_END - IRQ0_BASE)
     62
     63/* arch/sh/boards/se/7724/irq.c */
     64void init_se7724_IRQ(void);
     65
     66#define __IO_PREFIX		se7724
     67#include <asm/io_generic.h>
     68
     69#endif  /* __ASM_SH_SE7724_H */