cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ex.S (1020B)


      1/* SPDX-License-Identifier: GPL-2.0
      2 *
      3 * arch/sh/kernel/cpu/sh2a/ex.S
      4 *
      5 * The SH-2A exception vector table
      6 *
      7 * Copyright (C) 2008 Yoshinori Sato
      8 */
      9
     10#include <linux/linkage.h>
     11
     12!
     13! convert Exception Vector to Exception Number
     14!
     15
     16! exception no 0 to 255
     17exception_entry0:
     18no	=	0
     19	.rept	256
     20	mov.l	r1,@-sp
     21	bra	exception_trampoline0
     22	mov	#no,r1
     23no	=	no + 1
     24	.endr
     25exception_trampoline0:
     26	mov.l	r0,@-sp
     27	mov.l	1f,r0
     28	extu.b	r1,r1
     29	jmp	@r0
     30	  extu.w	r1,r1
     31	 
     32	.align	2
     331:	.long	exception_handler
     34
     35! exception no 256 to 511
     36exception_entry1:
     37no	=	0
     38	.rept	256
     39	mov.l	r1,@-sp
     40	bra	exception_trampoline1
     41	mov	#no,r1
     42no	=	no + 1
     43	.endr
     44exception_trampoline1:
     45	mov.l	r0,@-sp
     46	extu.b	r1,r1
     47	movi20	#0x100,r0
     48	add	r0,r1
     49	mov.l	1f,r0
     50	jmp	@r0
     51	  extu.w	r1,r1
     52	
     53	.align	2
     541:	.long	exception_handler
     55
     56	!
     57! Exception Vector Base
     58!
     59	.align	2
     60ENTRY(vbr_base)
     61vector	=	0
     62	.rept	256
     63	.long	exception_entry0 + vector * 6
     64vector	=	vector + 1
     65	.endr
     66vector	=	0
     67	.rept	256
     68	.long	exception_entry1 + vector * 6
     69vector	=	vector + 1
     70	.endr