cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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io.c (1917B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * arch/sh/lib/io.c - SH32 optimized I/O routines
      4 *
      5 * Copyright (C) 2000  Stuart Menefy
      6 * Copyright (C) 2005  Paul Mundt
      7 *
      8 * Provide real functions which expand to whatever the header file defined.
      9 * Also definitions of machine independent IO functions.
     10 */
     11#include <linux/module.h>
     12#include <linux/io.h>
     13
     14void __raw_readsl(const void __iomem *addr, void *datap, int len)
     15{
     16	u32 *data;
     17
     18	for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--)
     19		*data++ = __raw_readl(addr);
     20
     21	if (likely(len >= (0x20 >> 2))) {
     22		int tmp2, tmp3, tmp4, tmp5, tmp6;
     23
     24		__asm__ __volatile__(
     25			"1:			\n\t"
     26			"mov.l	@%7, r0		\n\t"
     27			"mov.l	@%7, %2		\n\t"
     28#ifdef CONFIG_CPU_SH4
     29			"movca.l r0, @%0	\n\t"
     30#else
     31			"mov.l	r0, @%0		\n\t"
     32#endif
     33			"mov.l	@%7, %3		\n\t"
     34			"mov.l	@%7, %4		\n\t"
     35			"mov.l	@%7, %5		\n\t"
     36			"mov.l	@%7, %6		\n\t"
     37			"mov.l	@%7, r7		\n\t"
     38			"mov.l	@%7, r0		\n\t"
     39			"mov.l	%2, @(0x04,%0)	\n\t"
     40			"mov	#0x20>>2, %2	\n\t"
     41			"mov.l	%3, @(0x08,%0)	\n\t"
     42			"sub	%2, %1		\n\t"
     43			"mov.l	%4, @(0x0c,%0)	\n\t"
     44			"cmp/hi	%1, %2		! T if 32 > len	\n\t"
     45			"mov.l	%5, @(0x10,%0)	\n\t"
     46			"mov.l	%6, @(0x14,%0)	\n\t"
     47			"mov.l	r7, @(0x18,%0)	\n\t"
     48			"mov.l	r0, @(0x1c,%0)	\n\t"
     49			"bf.s	1b		\n\t"
     50			" add	#0x20, %0	\n\t"
     51			: "=&r" (data), "=&r" (len),
     52			  "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4),
     53			  "=&r" (tmp5), "=&r" (tmp6)
     54			: "r"(addr), "0" (data), "1" (len)
     55			: "r0", "r7", "t", "memory");
     56	}
     57
     58	for (; len != 0; len--)
     59		*data++ = __raw_readl(addr);
     60}
     61EXPORT_SYMBOL(__raw_readsl);
     62
     63void __raw_writesl(void __iomem *addr, const void *data, int len)
     64{
     65	if (likely(len != 0)) {
     66		int tmp1;
     67
     68		__asm__ __volatile__ (
     69			"1:				\n\t"
     70			"mov.l	@%0+, %1	\n\t"
     71			"dt		%3		\n\t"
     72			"bf.s		1b		\n\t"
     73			" mov.l	%1, @%4		\n\t"
     74			: "=&r" (data), "=&r" (tmp1)
     75			: "0" (data), "r" (len), "r"(addr)
     76			: "t", "memory");
     77	}
     78}
     79EXPORT_SYMBOL(__raw_writesl);