cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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apb.h (1082B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * apb.h: Advanced PCI Bridge Configuration Registers and Bits
      4 *
      5 * Copyright (C) 1998  Eddie C. Dost  (ecd@skynet.be)
      6 */
      7
      8#ifndef _SPARC64_APB_H
      9#define _SPARC64_APB_H
     10
     11#define APB_TICK_REGISTER			0xb0
     12#define APB_INT_ACK				0xb8
     13#define APB_PRIMARY_MASTER_RETRY_LIMIT		0xc0
     14#define APB_DMA_ASFR				0xc8
     15#define APB_DMA_AFAR				0xd0
     16#define APB_PIO_TARGET_RETRY_LIMIT		0xd8
     17#define APB_PIO_TARGET_LATENCY_TIMER		0xd9
     18#define APB_DMA_TARGET_RETRY_LIMIT		0xda
     19#define APB_DMA_TARGET_LATENCY_TIMER		0xdb
     20#define APB_SECONDARY_MASTER_RETRY_LIMIT	0xdc
     21#define APB_SECONDARY_CONTROL			0xdd
     22#define APB_IO_ADDRESS_MAP			0xde
     23#define APB_MEM_ADDRESS_MAP			0xdf
     24
     25#define APB_PCI_CONTROL_LOW			0xe0
     26#  define APB_PCI_CTL_LOW_ARB_PARK			(1 << 21)
     27#  define APB_PCI_CTL_LOW_ERRINT_EN			(1 << 8)
     28
     29#define APB_PCI_CONTROL_HIGH			0xe4
     30#  define APB_PCI_CTL_HIGH_SERR				(1 << 2)
     31#  define APB_PCI_CTL_HIGH_ARBITER_EN			(1 << 0)
     32
     33#define APB_PIO_ASFR				0xe8
     34#define APB_PIO_AFAR				0xf0
     35#define APB_DIAG_REGISTER			0xf8
     36
     37#endif /* !(_SPARC64_APB_H) */