cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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io_32.h (3430B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef __SPARC_IO_H
      3#define __SPARC_IO_H
      4
      5#include <linux/kernel.h>
      6#include <linux/ioport.h>  /* struct resource */
      7
      8#define IO_SPACE_LIMIT 0xffffffff
      9
     10#define memset_io(d,c,sz)     _memset_io(d,c,sz)
     11#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz)
     12#define memcpy_toio(d,s,sz)   _memcpy_toio(d,s,sz)
     13
     14/*
     15 * Bus number may be embedded in the higher bits of the physical address.
     16 * This is why we have no bus number argument to ioremap().
     17 */
     18void __iomem *ioremap(phys_addr_t offset, size_t size);
     19void iounmap(volatile void __iomem *addr);
     20
     21#include <asm-generic/io.h>
     22
     23static inline void _memset_io(volatile void __iomem *dst,
     24                              int c, __kernel_size_t n)
     25{
     26	volatile void __iomem *d = dst;
     27
     28	while (n--) {
     29		writeb(c, d);
     30		d++;
     31	}
     32}
     33
     34static inline void _memcpy_fromio(void *dst, const volatile void __iomem *src,
     35                                  __kernel_size_t n)
     36{
     37	char *d = dst;
     38
     39	while (n--) {
     40		char tmp = readb(src);
     41		*d++ = tmp;
     42		src++;
     43	}
     44}
     45
     46static inline void _memcpy_toio(volatile void __iomem *dst, const void *src,
     47                                __kernel_size_t n)
     48{
     49	const char *s = src;
     50	volatile void __iomem *d = dst;
     51
     52	while (n--) {
     53		char tmp = *s++;
     54		writeb(tmp, d);
     55		d++;
     56	}
     57}
     58
     59/*
     60 * SBus accessors.
     61 *
     62 * SBus has only one, memory mapped, I/O space.
     63 * We do not need to flip bytes for SBus of course.
     64 */
     65static inline u8 sbus_readb(const volatile void __iomem *addr)
     66{
     67	return *(__force volatile u8 *)addr;
     68}
     69
     70static inline u16 sbus_readw(const volatile void __iomem *addr)
     71{
     72	return *(__force volatile u16 *)addr;
     73}
     74
     75static inline u32 sbus_readl(const volatile void __iomem *addr)
     76{
     77	return *(__force volatile u32 *)addr;
     78}
     79
     80static inline void sbus_writeb(u8 b, volatile void __iomem *addr)
     81{
     82	*(__force volatile u8 *)addr = b;
     83}
     84
     85static inline void sbus_writew(u16 w, volatile void __iomem *addr)
     86{
     87	*(__force volatile u16 *)addr = w;
     88}
     89
     90static inline void sbus_writel(u32 l, volatile void __iomem *addr)
     91{
     92	*(__force volatile u32 *)addr = l;
     93}
     94
     95static inline void sbus_memset_io(volatile void __iomem *__dst, int c,
     96                                  __kernel_size_t n)
     97{
     98	while(n--) {
     99		sbus_writeb(c, __dst);
    100		__dst++;
    101	}
    102}
    103
    104static inline void sbus_memcpy_fromio(void *dst,
    105                                      const volatile void __iomem *src,
    106                                      __kernel_size_t n)
    107{
    108	char *d = dst;
    109
    110	while (n--) {
    111		char tmp = sbus_readb(src);
    112		*d++ = tmp;
    113		src++;
    114	}
    115}
    116
    117static inline void sbus_memcpy_toio(volatile void __iomem *dst,
    118                                    const void *src,
    119                                    __kernel_size_t n)
    120{
    121	const char *s = src;
    122	volatile void __iomem *d = dst;
    123
    124	while (n--) {
    125		char tmp = *s++;
    126		sbus_writeb(tmp, d);
    127		d++;
    128	}
    129}
    130
    131/* Create a virtual mapping cookie for an IO port range */
    132void __iomem *ioport_map(unsigned long port, unsigned int nr);
    133void ioport_unmap(void __iomem *);
    134
    135/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
    136struct pci_dev;
    137void pci_iounmap(struct pci_dev *dev, void __iomem *);
    138
    139static inline int sbus_can_dma_64bit(void)
    140{
    141	return 0; /* actually, sparc_cpu_model==sun4d */
    142}
    143static inline int sbus_can_burst64(void)
    144{
    145	return 0; /* actually, sparc_cpu_model==sun4d */
    146}
    147struct device;
    148void sbus_set_sbus64(struct device *, int);
    149
    150#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED		1
    151
    152
    153#endif /* !(__SPARC_IO_H) */