cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sfafsr.h (3216B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _SPARC64_SFAFSR_H
      3#define _SPARC64_SFAFSR_H
      4
      5#include <linux/const.h>
      6
      7/* Spitfire Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */
      8
      9#define SFAFSR_ME		(_AC(1,UL) << SFAFSR_ME_SHIFT)
     10#define SFAFSR_ME_SHIFT		32
     11#define SFAFSR_PRIV		(_AC(1,UL) << SFAFSR_PRIV_SHIFT)
     12#define SFAFSR_PRIV_SHIFT	31
     13#define SFAFSR_ISAP		(_AC(1,UL) << SFAFSR_ISAP_SHIFT)
     14#define SFAFSR_ISAP_SHIFT	30
     15#define SFAFSR_ETP		(_AC(1,UL) << SFAFSR_ETP_SHIFT)
     16#define SFAFSR_ETP_SHIFT	29
     17#define SFAFSR_IVUE		(_AC(1,UL) << SFAFSR_IVUE_SHIFT)
     18#define SFAFSR_IVUE_SHIFT	28
     19#define SFAFSR_TO		(_AC(1,UL) << SFAFSR_TO_SHIFT)
     20#define SFAFSR_TO_SHIFT		27
     21#define SFAFSR_BERR		(_AC(1,UL) << SFAFSR_BERR_SHIFT)
     22#define SFAFSR_BERR_SHIFT	26
     23#define SFAFSR_LDP		(_AC(1,UL) << SFAFSR_LDP_SHIFT)
     24#define SFAFSR_LDP_SHIFT	25
     25#define SFAFSR_CP		(_AC(1,UL) << SFAFSR_CP_SHIFT)
     26#define SFAFSR_CP_SHIFT		24
     27#define SFAFSR_WP		(_AC(1,UL) << SFAFSR_WP_SHIFT)
     28#define SFAFSR_WP_SHIFT		23
     29#define SFAFSR_EDP		(_AC(1,UL) << SFAFSR_EDP_SHIFT)
     30#define SFAFSR_EDP_SHIFT	22
     31#define SFAFSR_UE		(_AC(1,UL) << SFAFSR_UE_SHIFT)
     32#define SFAFSR_UE_SHIFT		21
     33#define SFAFSR_CE		(_AC(1,UL) << SFAFSR_CE_SHIFT)
     34#define SFAFSR_CE_SHIFT		20
     35#define SFAFSR_ETS		(_AC(0xf,UL) << SFAFSR_ETS_SHIFT)
     36#define SFAFSR_ETS_SHIFT	16
     37#define SFAFSR_PSYND		(_AC(0xffff,UL) << SFAFSR_PSYND_SHIFT)
     38#define SFAFSR_PSYND_SHIFT	0
     39
     40/* UDB Error Register, ASI=0x7f VA<63:0>=0x0(High),0x18(Low) for read
     41 *                     ASI=0x77 VA<63:0>=0x0(High),0x18(Low) for write
     42 */
     43
     44#define UDBE_UE			(_AC(1,UL) << 9)
     45#define UDBE_CE			(_AC(1,UL) << 8)
     46#define UDBE_E_SYNDR		(_AC(0xff,UL) << 0)
     47
     48/* The trap handlers for asynchronous errors encode the AFSR and
     49 * other pieces of information into a 64-bit argument for C code
     50 * encoded as follows:
     51 *
     52 * -----------------------------------------------
     53 * |  UDB_H  |  UDB_L  | TL>1  |  TT  |   AFSR   |
     54 * -----------------------------------------------
     55 *  63     54 53     44    42   41  33 32       0
     56 *
     57 * The AFAR is passed in unchanged.
     58 */
     59#define SFSTAT_UDBH_MASK	(_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT)
     60#define SFSTAT_UDBH_SHIFT	54
     61#define SFSTAT_UDBL_MASK	(_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT)
     62#define SFSTAT_UDBL_SHIFT	44
     63#define SFSTAT_TL_GT_ONE	(_AC(1,UL) << SFSTAT_TL_GT_ONE_SHIFT)
     64#define SFSTAT_TL_GT_ONE_SHIFT	42
     65#define SFSTAT_TRAP_TYPE	(_AC(0x1FF,UL) << SFSTAT_TRAP_TYPE_SHIFT)
     66#define SFSTAT_TRAP_TYPE_SHIFT	33
     67#define SFSTAT_AFSR_MASK	(_AC(0x1ffffffff,UL) << SFSTAT_AFSR_SHIFT)
     68#define SFSTAT_AFSR_SHIFT	0
     69
     70/* ESTATE Error Enable Register, ASI=0x4b VA<63:0>=0x0 */
     71#define ESTATE_ERR_CE		0x1 /* Correctable errors                    */
     72#define ESTATE_ERR_NCE		0x2 /* TO, BERR, LDP, ETP, EDP, WP, UE, IVUE */
     73#define ESTATE_ERR_ISAP		0x4 /* System address parity error           */
     74#define ESTATE_ERR_ALL		(ESTATE_ERR_CE | \
     75				 ESTATE_ERR_NCE | \
     76				 ESTATE_ERR_ISAP)
     77
     78/* The various trap types that report using the above state. */
     79#define TRAP_TYPE_IAE		0x09 /* Instruction Access Error             */
     80#define TRAP_TYPE_DAE		0x32 /* Data Access Error                    */
     81#define TRAP_TYPE_CEE		0x63 /* Correctable ECC Error                */
     82
     83#endif /* _SPARC64_SFAFSR_H */