cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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utrap.h (1541B)


      1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
      2/*
      3 * include/asm/utrap.h
      4 *
      5 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
      6 */
      7
      8#ifndef __ASM_SPARC64_UTRAP_H
      9#define __ASM_SPARC64_UTRAP_H
     10
     11#define UT_INSTRUCTION_EXCEPTION		1
     12#define UT_INSTRUCTION_ERROR			2
     13#define UT_INSTRUCTION_PROTECTION		3
     14#define UT_ILLTRAP_INSTRUCTION			4
     15#define UT_ILLEGAL_INSTRUCTION			5
     16#define UT_PRIVILEGED_OPCODE			6
     17#define UT_FP_DISABLED				7
     18#define UT_FP_EXCEPTION_IEEE_754		8
     19#define UT_FP_EXCEPTION_OTHER			9
     20#define UT_TAG_OVERVIEW				10
     21#define UT_DIVISION_BY_ZERO			11
     22#define UT_DATA_EXCEPTION			12
     23#define UT_DATA_ERROR				13
     24#define UT_DATA_PROTECTION			14
     25#define UT_MEM_ADDRESS_NOT_ALIGNED		15
     26#define UT_PRIVILEGED_ACTION			16
     27#define UT_ASYNC_DATA_ERROR			17
     28#define UT_TRAP_INSTRUCTION_16			18
     29#define UT_TRAP_INSTRUCTION_17			19
     30#define UT_TRAP_INSTRUCTION_18			20
     31#define UT_TRAP_INSTRUCTION_19			21
     32#define UT_TRAP_INSTRUCTION_20			22
     33#define UT_TRAP_INSTRUCTION_21			23
     34#define UT_TRAP_INSTRUCTION_22			24
     35#define UT_TRAP_INSTRUCTION_23			25
     36#define UT_TRAP_INSTRUCTION_24			26
     37#define UT_TRAP_INSTRUCTION_25			27
     38#define UT_TRAP_INSTRUCTION_26			28
     39#define UT_TRAP_INSTRUCTION_27			29
     40#define UT_TRAP_INSTRUCTION_28			30
     41#define UT_TRAP_INSTRUCTION_29			31
     42#define UT_TRAP_INSTRUCTION_30			32
     43#define UT_TRAP_INSTRUCTION_31			33
     44
     45#define	UTH_NOCHANGE				(-1)
     46
     47#ifndef __ASSEMBLY__
     48typedef int utrap_entry_t;
     49typedef void *utrap_handler_t;
     50#endif /* __ASSEMBLY__ */
     51
     52#endif /* !(__ASM_SPARC64_PROCESSOR_H) */