cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dtlb_miss.S (786B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* DTLB ** ICACHE line 1: Context 0 check and TSB load	*/
      3	ldxa	[%g0] ASI_DMMU_TSB_8KB_PTR, %g1	! Get TSB 8K pointer
      4	ldxa	[%g0] ASI_DMMU, %g6		! Get TAG TARGET
      5	srlx	%g6, 48, %g5			! Get context
      6	sllx	%g6, 22, %g6			! Zero out context
      7	brz,pn	%g5, kvmap_dtlb			! Context 0 processing
      8	 srlx	%g6, 22, %g6			! Delay slot
      9	TSB_LOAD_QUAD(%g1, %g4)			! Load TSB entry
     10	cmp	%g4, %g6			! Compare TAG
     11
     12/* DTLB ** ICACHE line 2: TSB compare and TLB load	*/
     13	bne,pn	%xcc, tsb_miss_dtlb		! Miss
     14	 mov	FAULT_CODE_DTLB, %g3
     15	stxa	%g5, [%g0] ASI_DTLB_DATA_IN	! Load TLB
     16	retry					! Trap done
     17	nop
     18	nop
     19	nop
     20	nop
     21
     22/* DTLB ** ICACHE line 3:				*/
     23	nop
     24	nop
     25	nop
     26	nop
     27	nop
     28	nop
     29	nop
     30	nop
     31
     32/* DTLB ** ICACHE line 4: 				*/
     33	nop
     34	nop
     35	nop
     36	nop
     37	nop
     38	nop
     39	nop
     40	nop