cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dtlb_prot.S (1377B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * dtlb_prot.S: DTLB protection trap strategy.
      4 *              This is included directly into the trap table.
      5 *
      6 * Copyright (C) 1996,1998 David S. Miller (davem@redhat.com)
      7 * Copyright (C) 1997,1998 Jakub Jelinek   (jj@ultra.linux.cz)
      8 */
      9
     10/* Ways we can get here:
     11 *
     12 * [TL == 0] 1) User stores to readonly pages.
     13 * [TL == 0] 2) Nucleus stores to user readonly pages.
     14 * [TL >  0] 3) Nucleus stores to user readonly stack frame.
     15 */
     16
     17/* PROT ** ICACHE line 1: User DTLB protection trap	*/
     18	mov		TLB_SFSR, %g1
     19	stxa		%g0, [%g1] ASI_DMMU		! Clear FaultValid bit
     20	membar		#Sync				! Synchronize stores
     21	rdpr		%pstate, %g5			! Move into alt-globals
     22	wrpr		%g5, PSTATE_AG|PSTATE_MG, %pstate
     23	rdpr		%tl, %g1			! Need a winfixup?
     24	cmp		%g1, 1				! Trap level >1?
     25	mov		TLB_TAG_ACCESS, %g4		! For reload of vaddr
     26
     27/* PROT ** ICACHE line 2: More real fault processing */
     28	ldxa		[%g4] ASI_DMMU, %g5		! Put tagaccess in %g5
     29	srlx		%g5, PAGE_SHIFT, %g5
     30	sllx		%g5, PAGE_SHIFT, %g5		! Clear context ID bits
     31	bgu,pn		%xcc, winfix_trampoline		! Yes, perform winfixup
     32	 mov		FAULT_CODE_DTLB | FAULT_CODE_WRITE, %g4
     33	ba,pt		%xcc, sparc64_realfault_common	! Nope, normal fault
     34	 nop
     35	nop
     36
     37/* PROT ** ICACHE line 3: Unused...	*/
     38	nop
     39	nop
     40	nop
     41	nop
     42	nop
     43	nop
     44	nop
     45	nop
     46
     47/* PROT ** ICACHE line 4: Unused...	*/
     48	nop
     49	nop
     50	nop
     51	nop
     52	nop
     53	nop
     54	nop
     55	nop