cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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msr.h (662B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Helpers/definitions related to MSR access.
      4 */
      5
      6#ifndef BOOT_MSR_H
      7#define BOOT_MSR_H
      8
      9#include <asm/shared/msr.h>
     10
     11/*
     12 * The kernel proper already defines rdmsr()/wrmsr(), but they are not for the
     13 * boot kernel since they rely on tracepoint/exception handling infrastructure
     14 * that's not available here.
     15 */
     16static inline void boot_rdmsr(unsigned int reg, struct msr *m)
     17{
     18	asm volatile("rdmsr" : "=a" (m->l), "=d" (m->h) : "c" (reg));
     19}
     20
     21static inline void boot_wrmsr(unsigned int reg, const struct msr *m)
     22{
     23	asm volatile("wrmsr" : : "c" (reg), "a"(m->l), "d" (m->h) : "memory");
     24}
     25
     26#endif /* BOOT_MSR_H */