cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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desc_defs.h (3396B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Written 2000 by Andi Kleen */
      3#ifndef _ASM_X86_DESC_DEFS_H
      4#define _ASM_X86_DESC_DEFS_H
      5
      6/*
      7 * Segment descriptor structure definitions, usable from both x86_64 and i386
      8 * archs.
      9 */
     10
     11#ifndef __ASSEMBLY__
     12
     13#include <linux/types.h>
     14
     15/* 8 byte segment descriptor */
     16struct desc_struct {
     17	u16	limit0;
     18	u16	base0;
     19	u16	base1: 8, type: 4, s: 1, dpl: 2, p: 1;
     20	u16	limit1: 4, avl: 1, l: 1, d: 1, g: 1, base2: 8;
     21} __attribute__((packed));
     22
     23#define GDT_ENTRY_INIT(flags, base, limit)			\
     24	{							\
     25		.limit0		= (u16) (limit),		\
     26		.limit1		= ((limit) >> 16) & 0x0F,	\
     27		.base0		= (u16) (base),			\
     28		.base1		= ((base) >> 16) & 0xFF,	\
     29		.base2		= ((base) >> 24) & 0xFF,	\
     30		.type		= (flags & 0x0f),		\
     31		.s		= (flags >> 4) & 0x01,		\
     32		.dpl		= (flags >> 5) & 0x03,		\
     33		.p		= (flags >> 7) & 0x01,		\
     34		.avl		= (flags >> 12) & 0x01,		\
     35		.l		= (flags >> 13) & 0x01,		\
     36		.d		= (flags >> 14) & 0x01,		\
     37		.g		= (flags >> 15) & 0x01,		\
     38	}
     39
     40enum {
     41	GATE_INTERRUPT = 0xE,
     42	GATE_TRAP = 0xF,
     43	GATE_CALL = 0xC,
     44	GATE_TASK = 0x5,
     45};
     46
     47enum {
     48	DESC_TSS = 0x9,
     49	DESC_LDT = 0x2,
     50	DESCTYPE_S = 0x10,	/* !system */
     51};
     52
     53/* LDT or TSS descriptor in the GDT. */
     54struct ldttss_desc {
     55	u16	limit0;
     56	u16	base0;
     57
     58	u16	base1 : 8, type : 5, dpl : 2, p : 1;
     59	u16	limit1 : 4, zero0 : 3, g : 1, base2 : 8;
     60#ifdef CONFIG_X86_64
     61	u32	base3;
     62	u32	zero1;
     63#endif
     64} __attribute__((packed));
     65
     66typedef struct ldttss_desc ldt_desc;
     67typedef struct ldttss_desc tss_desc;
     68
     69struct idt_bits {
     70	u16		ist	: 3,
     71			zero	: 5,
     72			type	: 5,
     73			dpl	: 2,
     74			p	: 1;
     75} __attribute__((packed));
     76
     77struct idt_data {
     78	unsigned int	vector;
     79	unsigned int	segment;
     80	struct idt_bits	bits;
     81	const void	*addr;
     82};
     83
     84struct gate_struct {
     85	u16		offset_low;
     86	u16		segment;
     87	struct idt_bits	bits;
     88	u16		offset_middle;
     89#ifdef CONFIG_X86_64
     90	u32		offset_high;
     91	u32		reserved;
     92#endif
     93} __attribute__((packed));
     94
     95typedef struct gate_struct gate_desc;
     96
     97static inline unsigned long gate_offset(const gate_desc *g)
     98{
     99#ifdef CONFIG_X86_64
    100	return g->offset_low | ((unsigned long)g->offset_middle << 16) |
    101		((unsigned long) g->offset_high << 32);
    102#else
    103	return g->offset_low | ((unsigned long)g->offset_middle << 16);
    104#endif
    105}
    106
    107static inline unsigned long gate_segment(const gate_desc *g)
    108{
    109	return g->segment;
    110}
    111
    112struct desc_ptr {
    113	unsigned short size;
    114	unsigned long address;
    115} __attribute__((packed)) ;
    116
    117#endif /* !__ASSEMBLY__ */
    118
    119/* Boot IDT definitions */
    120#define	BOOT_IDT_ENTRIES	32
    121
    122/* Access rights as returned by LAR */
    123#define AR_TYPE_RODATA		(0 * (1 << 9))
    124#define AR_TYPE_RWDATA		(1 * (1 << 9))
    125#define AR_TYPE_RODATA_EXPDOWN	(2 * (1 << 9))
    126#define AR_TYPE_RWDATA_EXPDOWN	(3 * (1 << 9))
    127#define AR_TYPE_XOCODE		(4 * (1 << 9))
    128#define AR_TYPE_XRCODE		(5 * (1 << 9))
    129#define AR_TYPE_XOCODE_CONF	(6 * (1 << 9))
    130#define AR_TYPE_XRCODE_CONF	(7 * (1 << 9))
    131#define AR_TYPE_MASK		(7 * (1 << 9))
    132
    133#define AR_DPL0			(0 * (1 << 13))
    134#define AR_DPL3			(3 * (1 << 13))
    135#define AR_DPL_MASK		(3 * (1 << 13))
    136
    137#define AR_A			(1 << 8)   /* "Accessed" */
    138#define AR_S			(1 << 12)  /* If clear, "System" segment */
    139#define AR_P			(1 << 15)  /* "Present" */
    140#define AR_AVL			(1 << 20)  /* "AVaiLable" (no HW effect) */
    141#define AR_L			(1 << 21)  /* "Long mode" for code segments */
    142#define AR_DB			(1 << 22)  /* D/B, effect depends on type */
    143#define AR_G			(1 << 23)  /* "Granularity" (limit in pages) */
    144
    145#endif /* _ASM_X86_DESC_DEFS_H */