cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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disabled-features.h (2833B)


      1#ifndef _ASM_X86_DISABLED_FEATURES_H
      2#define _ASM_X86_DISABLED_FEATURES_H
      3
      4/* These features, although they might be available in a CPU
      5 * will not be used because the compile options to support
      6 * them are not present.
      7 *
      8 * This code allows them to be checked and disabled at
      9 * compile time without an explicit #ifdef.  Use
     10 * cpu_feature_enabled().
     11 */
     12
     13#ifdef CONFIG_X86_UMIP
     14# define DISABLE_UMIP	0
     15#else
     16# define DISABLE_UMIP	(1<<(X86_FEATURE_UMIP & 31))
     17#endif
     18
     19#ifdef CONFIG_X86_64
     20# define DISABLE_VME		(1<<(X86_FEATURE_VME & 31))
     21# define DISABLE_K6_MTRR	(1<<(X86_FEATURE_K6_MTRR & 31))
     22# define DISABLE_CYRIX_ARR	(1<<(X86_FEATURE_CYRIX_ARR & 31))
     23# define DISABLE_CENTAUR_MCR	(1<<(X86_FEATURE_CENTAUR_MCR & 31))
     24# define DISABLE_PCID		0
     25#else
     26# define DISABLE_VME		0
     27# define DISABLE_K6_MTRR	0
     28# define DISABLE_CYRIX_ARR	0
     29# define DISABLE_CENTAUR_MCR	0
     30# define DISABLE_PCID		(1<<(X86_FEATURE_PCID & 31))
     31#endif /* CONFIG_X86_64 */
     32
     33#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
     34# define DISABLE_PKU		0
     35# define DISABLE_OSPKE		0
     36#else
     37# define DISABLE_PKU		(1<<(X86_FEATURE_PKU & 31))
     38# define DISABLE_OSPKE		(1<<(X86_FEATURE_OSPKE & 31))
     39#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
     40
     41#ifdef CONFIG_X86_5LEVEL
     42# define DISABLE_LA57	0
     43#else
     44# define DISABLE_LA57	(1<<(X86_FEATURE_LA57 & 31))
     45#endif
     46
     47#ifdef CONFIG_PAGE_TABLE_ISOLATION
     48# define DISABLE_PTI		0
     49#else
     50# define DISABLE_PTI		(1 << (X86_FEATURE_PTI & 31))
     51#endif
     52
     53#ifdef CONFIG_INTEL_IOMMU_SVM
     54# define DISABLE_ENQCMD		0
     55#else
     56# define DISABLE_ENQCMD		(1 << (X86_FEATURE_ENQCMD & 31))
     57#endif
     58
     59#ifdef CONFIG_X86_SGX
     60# define DISABLE_SGX	0
     61#else
     62# define DISABLE_SGX	(1 << (X86_FEATURE_SGX & 31))
     63#endif
     64
     65#ifdef CONFIG_INTEL_TDX_GUEST
     66# define DISABLE_TDX_GUEST	0
     67#else
     68# define DISABLE_TDX_GUEST	(1 << (X86_FEATURE_TDX_GUEST & 31))
     69#endif
     70
     71#ifdef CONFIG_AMD_MEM_ENCRYPT
     72# define DISABLE_SEV_SNP	0
     73#else
     74# define DISABLE_SEV_SNP	(1 << (X86_FEATURE_SEV_SNP & 31))
     75#endif
     76
     77/*
     78 * Make sure to add features to the correct mask
     79 */
     80#define DISABLED_MASK0	(DISABLE_VME)
     81#define DISABLED_MASK1	0
     82#define DISABLED_MASK2	0
     83#define DISABLED_MASK3	(DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
     84#define DISABLED_MASK4	(DISABLE_PCID)
     85#define DISABLED_MASK5	0
     86#define DISABLED_MASK6	0
     87#define DISABLED_MASK7	(DISABLE_PTI)
     88#define DISABLED_MASK8	(DISABLE_TDX_GUEST)
     89#define DISABLED_MASK9	(DISABLE_SGX)
     90#define DISABLED_MASK10	0
     91#define DISABLED_MASK11	0
     92#define DISABLED_MASK12	0
     93#define DISABLED_MASK13	0
     94#define DISABLED_MASK14	0
     95#define DISABLED_MASK15	0
     96#define DISABLED_MASK16	(DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \
     97			 DISABLE_ENQCMD)
     98#define DISABLED_MASK17	0
     99#define DISABLED_MASK18	0
    100#define DISABLED_MASK19	(DISABLE_SEV_SNP)
    101#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 20)
    102
    103#endif /* _ASM_X86_DISABLED_FEATURES_H */