cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hw_irq.h (3070B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _ASM_X86_HW_IRQ_H
      3#define _ASM_X86_HW_IRQ_H
      4
      5/*
      6 * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
      7 *
      8 * moved some of the old arch/i386/kernel/irq.h to here. VY
      9 *
     10 * IRQ/IPI changes taken from work by Thomas Radke
     11 * <tomsoft@informatik.tu-chemnitz.de>
     12 *
     13 * hacked by Andi Kleen for x86-64.
     14 * unified by tglx
     15 */
     16
     17#include <asm/irq_vectors.h>
     18
     19#define IRQ_MATRIX_BITS		NR_VECTORS
     20
     21#ifndef __ASSEMBLY__
     22
     23#include <linux/percpu.h>
     24#include <linux/profile.h>
     25#include <linux/smp.h>
     26
     27#include <linux/atomic.h>
     28#include <asm/irq.h>
     29#include <asm/sections.h>
     30
     31#ifdef	CONFIG_X86_LOCAL_APIC
     32struct irq_data;
     33struct pci_dev;
     34struct msi_desc;
     35
     36enum irq_alloc_type {
     37	X86_IRQ_ALLOC_TYPE_IOAPIC = 1,
     38	X86_IRQ_ALLOC_TYPE_HPET,
     39	X86_IRQ_ALLOC_TYPE_PCI_MSI,
     40	X86_IRQ_ALLOC_TYPE_PCI_MSIX,
     41	X86_IRQ_ALLOC_TYPE_DMAR,
     42	X86_IRQ_ALLOC_TYPE_AMDVI,
     43	X86_IRQ_ALLOC_TYPE_UV,
     44};
     45
     46struct ioapic_alloc_info {
     47	int		pin;
     48	int		node;
     49	u32		is_level	: 1;
     50	u32		active_low	: 1;
     51	u32		valid		: 1;
     52};
     53
     54struct uv_alloc_info {
     55	int		limit;
     56	int		blade;
     57	unsigned long	offset;
     58	char		*name;
     59
     60};
     61
     62/**
     63 * irq_alloc_info - X86 specific interrupt allocation info
     64 * @type:	X86 specific allocation type
     65 * @flags:	Flags for allocation tweaks
     66 * @devid:	Device ID for allocations
     67 * @hwirq:	Associated hw interrupt number in the domain
     68 * @mask:	CPU mask for vector allocation
     69 * @desc:	Pointer to msi descriptor
     70 * @data:	Allocation specific data
     71 *
     72 * @ioapic:	IOAPIC specific allocation data
     73 * @uv:		UV specific allocation data
     74*/
     75struct irq_alloc_info {
     76	enum irq_alloc_type	type;
     77	u32			flags;
     78	u32			devid;
     79	irq_hw_number_t		hwirq;
     80	const struct cpumask	*mask;
     81	struct msi_desc		*desc;
     82	void			*data;
     83
     84	union {
     85		struct ioapic_alloc_info	ioapic;
     86		struct uv_alloc_info		uv;
     87	};
     88};
     89
     90struct irq_cfg {
     91	unsigned int		dest_apicid;
     92	unsigned int		vector;
     93};
     94
     95extern struct irq_cfg *irq_cfg(unsigned int irq);
     96extern struct irq_cfg *irqd_cfg(struct irq_data *irq_data);
     97extern void lock_vector_lock(void);
     98extern void unlock_vector_lock(void);
     99#ifdef CONFIG_SMP
    100extern void send_cleanup_vector(struct irq_cfg *);
    101extern void irq_complete_move(struct irq_cfg *cfg);
    102#else
    103static inline void send_cleanup_vector(struct irq_cfg *c) { }
    104static inline void irq_complete_move(struct irq_cfg *c) { }
    105#endif
    106
    107extern void apic_ack_edge(struct irq_data *data);
    108#else	/*  CONFIG_X86_LOCAL_APIC */
    109static inline void lock_vector_lock(void) {}
    110static inline void unlock_vector_lock(void) {}
    111#endif	/* CONFIG_X86_LOCAL_APIC */
    112
    113/* Statistics */
    114extern atomic_t irq_err_count;
    115extern atomic_t irq_mis_count;
    116
    117extern void elcr_set_level_irq(unsigned int irq);
    118
    119extern char irq_entries_start[];
    120#ifdef CONFIG_TRACING
    121#define trace_irq_entries_start irq_entries_start
    122#endif
    123
    124extern char spurious_entries_start[];
    125
    126#define VECTOR_UNUSED		NULL
    127#define VECTOR_SHUTDOWN		((void *)-1L)
    128#define VECTOR_RETRIGGERED	((void *)-2L)
    129
    130typedef struct irq_desc* vector_irq_t[NR_VECTORS];
    131DECLARE_PER_CPU(vector_irq_t, vector_irq);
    132
    133#endif /* !ASSEMBLY_ */
    134
    135#endif /* _ASM_X86_HW_IRQ_H */