mpspec_def.h (4256B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef _ASM_X86_MPSPEC_DEF_H 3#define _ASM_X86_MPSPEC_DEF_H 4 5/* 6 * Structure definitions for SMP machines following the 7 * Intel Multiprocessing Specification 1.1 and 1.4. 8 */ 9 10/* 11 * This tag identifies where the SMP configuration 12 * information is. 13 */ 14 15#define SMP_MAGIC_IDENT (('_'<<24) | ('P'<<16) | ('M'<<8) | '_') 16 17#ifdef CONFIG_X86_32 18# define MAX_MPC_ENTRY 1024 19#endif 20 21/* Intel MP Floating Pointer Structure */ 22struct mpf_intel { 23 char signature[4]; /* "_MP_" */ 24 unsigned int physptr; /* Configuration table address */ 25 unsigned char length; /* Our length (paragraphs) */ 26 unsigned char specification; /* Specification version */ 27 unsigned char checksum; /* Checksum (makes sum 0) */ 28 unsigned char feature1; /* Standard or configuration ? */ 29 unsigned char feature2; /* Bit7 set for IMCR|PIC */ 30 unsigned char feature3; /* Unused (0) */ 31 unsigned char feature4; /* Unused (0) */ 32 unsigned char feature5; /* Unused (0) */ 33}; 34 35#define MPC_SIGNATURE "PCMP" 36 37struct mpc_table { 38 char signature[4]; 39 unsigned short length; /* Size of table */ 40 char spec; /* 0x01 */ 41 char checksum; 42 char oem[8]; 43 char productid[12]; 44 unsigned int oemptr; /* 0 if not present */ 45 unsigned short oemsize; /* 0 if not present */ 46 unsigned short oemcount; 47 unsigned int lapic; /* APIC address */ 48 unsigned int reserved; 49}; 50 51/* Followed by entries */ 52 53#define MP_PROCESSOR 0 54#define MP_BUS 1 55#define MP_IOAPIC 2 56#define MP_INTSRC 3 57#define MP_LINTSRC 4 58/* Used by IBM NUMA-Q to describe node locality */ 59#define MP_TRANSLATION 192 60 61#define CPU_ENABLED 1 /* Processor is available */ 62#define CPU_BOOTPROCESSOR 2 /* Processor is the boot CPU */ 63 64#define CPU_STEPPING_MASK 0x000F 65#define CPU_MODEL_MASK 0x00F0 66#define CPU_FAMILY_MASK 0x0F00 67 68struct mpc_cpu { 69 unsigned char type; 70 unsigned char apicid; /* Local APIC number */ 71 unsigned char apicver; /* Its versions */ 72 unsigned char cpuflag; 73 unsigned int cpufeature; 74 unsigned int featureflag; /* CPUID feature value */ 75 unsigned int reserved[2]; 76}; 77 78struct mpc_bus { 79 unsigned char type; 80 unsigned char busid; 81 unsigned char bustype[6]; 82}; 83 84/* List of Bus Type string values, Intel MP Spec. */ 85#define BUSTYPE_EISA "EISA" 86#define BUSTYPE_ISA "ISA" 87#define BUSTYPE_INTERN "INTERN" /* Internal BUS */ 88#define BUSTYPE_MCA "MCA" /* Obsolete */ 89#define BUSTYPE_VL "VL" /* Local bus */ 90#define BUSTYPE_PCI "PCI" 91#define BUSTYPE_PCMCIA "PCMCIA" 92#define BUSTYPE_CBUS "CBUS" 93#define BUSTYPE_CBUSII "CBUSII" 94#define BUSTYPE_FUTURE "FUTURE" 95#define BUSTYPE_MBI "MBI" 96#define BUSTYPE_MBII "MBII" 97#define BUSTYPE_MPI "MPI" 98#define BUSTYPE_MPSA "MPSA" 99#define BUSTYPE_NUBUS "NUBUS" 100#define BUSTYPE_TC "TC" 101#define BUSTYPE_VME "VME" 102#define BUSTYPE_XPRESS "XPRESS" 103 104#define MPC_APIC_USABLE 0x01 105 106struct mpc_ioapic { 107 unsigned char type; 108 unsigned char apicid; 109 unsigned char apicver; 110 unsigned char flags; 111 unsigned int apicaddr; 112}; 113 114struct mpc_intsrc { 115 unsigned char type; 116 unsigned char irqtype; 117 unsigned short irqflag; 118 unsigned char srcbus; 119 unsigned char srcbusirq; 120 unsigned char dstapic; 121 unsigned char dstirq; 122}; 123 124enum mp_irq_source_types { 125 mp_INT = 0, 126 mp_NMI = 1, 127 mp_SMI = 2, 128 mp_ExtINT = 3 129}; 130 131#define MP_IRQPOL_DEFAULT 0x0 132#define MP_IRQPOL_ACTIVE_HIGH 0x1 133#define MP_IRQPOL_RESERVED 0x2 134#define MP_IRQPOL_ACTIVE_LOW 0x3 135#define MP_IRQPOL_MASK 0x3 136 137#define MP_IRQTRIG_DEFAULT 0x0 138#define MP_IRQTRIG_EDGE 0x4 139#define MP_IRQTRIG_RESERVED 0x8 140#define MP_IRQTRIG_LEVEL 0xc 141#define MP_IRQTRIG_MASK 0xc 142 143#define MP_APIC_ALL 0xFF 144 145struct mpc_lintsrc { 146 unsigned char type; 147 unsigned char irqtype; 148 unsigned short irqflag; 149 unsigned char srcbusid; 150 unsigned char srcbusirq; 151 unsigned char destapic; 152 unsigned char destapiclint; 153}; 154 155#define MPC_OEM_SIGNATURE "_OEM" 156 157struct mpc_oemtable { 158 char signature[4]; 159 unsigned short length; /* Size of table */ 160 char rev; /* 0x01 */ 161 char checksum; 162 char mpc[8]; 163}; 164 165/* 166 * Default configurations 167 * 168 * 1 2 CPU ISA 82489DX 169 * 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining 170 * 3 2 CPU EISA 82489DX 171 * 4 2 CPU MCA 82489DX 172 * 5 2 CPU ISA+PCI 173 * 6 2 CPU EISA+PCI 174 * 7 2 CPU MCA+PCI 175 */ 176 177enum mp_bustype { 178 MP_BUS_ISA = 1, 179 MP_BUS_EISA, 180 MP_BUS_PCI, 181}; 182#endif /* _ASM_X86_MPSPEC_DEF_H */