cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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olpc.h (2382B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* OLPC machine specific definitions */
      3
      4#ifndef _ASM_X86_OLPC_H
      5#define _ASM_X86_OLPC_H
      6
      7#include <asm/geode.h>
      8
      9struct olpc_platform_t {
     10	int flags;
     11	uint32_t boardrev;
     12};
     13
     14#define OLPC_F_PRESENT		0x01
     15#define OLPC_F_DCON		0x02
     16
     17#ifdef CONFIG_OLPC
     18
     19extern struct olpc_platform_t olpc_platform_info;
     20
     21/*
     22 * OLPC board IDs contain the major build number within the mask 0x0ff0,
     23 * and the minor build number within 0x000f.  Pre-builds have a minor
     24 * number less than 8, and normal builds start at 8.  For example, 0x0B10
     25 * is a PreB1, and 0x0C18 is a C1.
     26 */
     27
     28static inline uint32_t olpc_board(uint8_t id)
     29{
     30	return (id << 4) | 0x8;
     31}
     32
     33static inline uint32_t olpc_board_pre(uint8_t id)
     34{
     35	return id << 4;
     36}
     37
     38static inline int machine_is_olpc(void)
     39{
     40	return (olpc_platform_info.flags & OLPC_F_PRESENT) ? 1 : 0;
     41}
     42
     43/*
     44 * The DCON is OLPC's Display Controller.  It has a number of unique
     45 * features that we might want to take advantage of..
     46 */
     47static inline int olpc_has_dcon(void)
     48{
     49	return (olpc_platform_info.flags & OLPC_F_DCON) ? 1 : 0;
     50}
     51
     52/*
     53 * The "Mass Production" version of OLPC's XO is identified as being model
     54 * C2.  During the prototype phase, the following models (in chronological
     55 * order) were created: A1, B1, B2, B3, B4, C1.  The A1 through B2 models
     56 * were based on Geode GX CPUs, and models after that were based upon
     57 * Geode LX CPUs.  There were also some hand-assembled models floating
     58 * around, referred to as PreB1, PreB2, etc.
     59 */
     60static inline int olpc_board_at_least(uint32_t rev)
     61{
     62	return olpc_platform_info.boardrev >= rev;
     63}
     64
     65#else
     66
     67static inline int machine_is_olpc(void)
     68{
     69	return 0;
     70}
     71
     72static inline int olpc_has_dcon(void)
     73{
     74	return 0;
     75}
     76
     77#endif
     78
     79#ifdef CONFIG_OLPC_XO1_PM
     80extern void do_olpc_suspend_lowlevel(void);
     81extern void olpc_xo1_pm_wakeup_set(u16 value);
     82extern void olpc_xo1_pm_wakeup_clear(u16 value);
     83#endif
     84
     85extern int pci_olpc_init(void);
     86
     87/* GPIO assignments */
     88
     89#define OLPC_GPIO_MIC_AC	1
     90#define OLPC_GPIO_DCON_STAT0	5
     91#define OLPC_GPIO_DCON_STAT1	6
     92#define OLPC_GPIO_DCON_IRQ	7
     93#define OLPC_GPIO_THRM_ALRM	geode_gpio(10)
     94#define OLPC_GPIO_DCON_LOAD    11
     95#define OLPC_GPIO_DCON_BLANK   12
     96#define OLPC_GPIO_SMB_CLK      14
     97#define OLPC_GPIO_SMB_DATA     15
     98#define OLPC_GPIO_WORKAUX	geode_gpio(24)
     99#define OLPC_GPIO_LID		26
    100#define OLPC_GPIO_ECSCI		27
    101
    102#endif /* _ASM_X86_OLPC_H */