cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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interface_64.h (4665B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _ASM_X86_XEN_INTERFACE_64_H
      3#define _ASM_X86_XEN_INTERFACE_64_H
      4
      5/*
      6 * 64-bit segment selectors
      7 * These flat segments are in the Xen-private section of every GDT. Since these
      8 * are also present in the initial GDT, many OSes will be able to avoid
      9 * installing their own GDT.
     10 */
     11
     12#define FLAT_RING3_CS32 0xe023  /* GDT index 260 */
     13#define FLAT_RING3_CS64 0xe033  /* GDT index 261 */
     14#define FLAT_RING3_DS32 0xe02b  /* GDT index 262 */
     15#define FLAT_RING3_DS64 0x0000  /* NULL selector */
     16#define FLAT_RING3_SS32 0xe02b  /* GDT index 262 */
     17#define FLAT_RING3_SS64 0xe02b  /* GDT index 262 */
     18
     19#define FLAT_KERNEL_DS64 FLAT_RING3_DS64
     20#define FLAT_KERNEL_DS32 FLAT_RING3_DS32
     21#define FLAT_KERNEL_DS   FLAT_KERNEL_DS64
     22#define FLAT_KERNEL_CS64 FLAT_RING3_CS64
     23#define FLAT_KERNEL_CS32 FLAT_RING3_CS32
     24#define FLAT_KERNEL_CS   FLAT_KERNEL_CS64
     25#define FLAT_KERNEL_SS64 FLAT_RING3_SS64
     26#define FLAT_KERNEL_SS32 FLAT_RING3_SS32
     27#define FLAT_KERNEL_SS   FLAT_KERNEL_SS64
     28
     29#define FLAT_USER_DS64 FLAT_RING3_DS64
     30#define FLAT_USER_DS32 FLAT_RING3_DS32
     31#define FLAT_USER_DS   FLAT_USER_DS64
     32#define FLAT_USER_CS64 FLAT_RING3_CS64
     33#define FLAT_USER_CS32 FLAT_RING3_CS32
     34#define FLAT_USER_CS   FLAT_USER_CS64
     35#define FLAT_USER_SS64 FLAT_RING3_SS64
     36#define FLAT_USER_SS32 FLAT_RING3_SS32
     37#define FLAT_USER_SS   FLAT_USER_SS64
     38
     39#define __HYPERVISOR_VIRT_START 0xFFFF800000000000
     40#define __HYPERVISOR_VIRT_END   0xFFFF880000000000
     41#define __MACH2PHYS_VIRT_START  0xFFFF800000000000
     42#define __MACH2PHYS_VIRT_END    0xFFFF804000000000
     43#define __MACH2PHYS_SHIFT       3
     44
     45/*
     46 * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base)
     47 *  @which == SEGBASE_*  ;  @base == 64-bit base address
     48 * Returns 0 on success.
     49 */
     50#define SEGBASE_FS          0
     51#define SEGBASE_GS_USER     1
     52#define SEGBASE_GS_KERNEL   2
     53#define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */
     54
     55/*
     56 * int HYPERVISOR_iret(void)
     57 * All arguments are on the kernel stack, in the following format.
     58 * Never returns if successful. Current kernel context is lost.
     59 * The saved CS is mapped as follows:
     60 *   RING0 -> RING3 kernel mode.
     61 *   RING1 -> RING3 kernel mode.
     62 *   RING2 -> RING3 kernel mode.
     63 *   RING3 -> RING3 user mode.
     64 * However RING0 indicates that the guest kernel should return to iteself
     65 * directly with
     66 *      orb   $3,1*8(%rsp)
     67 *      iretq
     68 * If flags contains VGCF_in_syscall:
     69 *   Restore RAX, RIP, RFLAGS, RSP.
     70 *   Discard R11, RCX, CS, SS.
     71 * Otherwise:
     72 *   Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP.
     73 * All other registers are saved on hypercall entry and restored to user.
     74 */
     75/* Guest exited in SYSCALL context? Return to guest with SYSRET? */
     76#define _VGCF_in_syscall 8
     77#define VGCF_in_syscall  (1<<_VGCF_in_syscall)
     78#define VGCF_IN_SYSCALL  VGCF_in_syscall
     79
     80#ifndef __ASSEMBLY__
     81
     82struct iret_context {
     83    /* Top of stack (%rsp at point of hypercall). */
     84    uint64_t rax, r11, rcx, flags, rip, cs, rflags, rsp, ss;
     85    /* Bottom of iret stack frame. */
     86};
     87
     88#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
     89/* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */
     90#define __DECL_REG(name) union { \
     91    uint64_t r ## name, e ## name; \
     92    uint32_t _e ## name; \
     93}
     94#else
     95/* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */
     96#define __DECL_REG(name) uint64_t r ## name
     97#endif
     98
     99struct cpu_user_regs {
    100    uint64_t r15;
    101    uint64_t r14;
    102    uint64_t r13;
    103    uint64_t r12;
    104    __DECL_REG(bp);
    105    __DECL_REG(bx);
    106    uint64_t r11;
    107    uint64_t r10;
    108    uint64_t r9;
    109    uint64_t r8;
    110    __DECL_REG(ax);
    111    __DECL_REG(cx);
    112    __DECL_REG(dx);
    113    __DECL_REG(si);
    114    __DECL_REG(di);
    115    uint32_t error_code;    /* private */
    116    uint32_t entry_vector;  /* private */
    117    __DECL_REG(ip);
    118    uint16_t cs, _pad0[1];
    119    uint8_t  saved_upcall_mask;
    120    uint8_t  _pad1[3];
    121    __DECL_REG(flags);      /* rflags.IF == !saved_upcall_mask */
    122    __DECL_REG(sp);
    123    uint16_t ss, _pad2[3];
    124    uint16_t es, _pad3[3];
    125    uint16_t ds, _pad4[3];
    126    uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base.     */
    127    uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */
    128};
    129DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
    130
    131#undef __DECL_REG
    132
    133#define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12)
    134#define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12)
    135
    136struct arch_vcpu_info {
    137    unsigned long cr2;
    138    unsigned long pad; /* sizeof(vcpu_info_t) == 64 */
    139};
    140
    141typedef unsigned long xen_callback_t;
    142
    143#define XEN_CALLBACK(__cs, __rip)				\
    144	((unsigned long)(__rip))
    145
    146#endif /* !__ASSEMBLY__ */
    147
    148
    149#endif /* _ASM_X86_XEN_INTERFACE_64_H */