cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mtrr.h (4240B)


      1/* SPDX-License-Identifier: LGPL-2.0+ WITH Linux-syscall-note */
      2/*  Generic MTRR (Memory Type Range Register) ioctls.
      3
      4    Copyright (C) 1997-1999  Richard Gooch
      5
      6    This library is free software; you can redistribute it and/or
      7    modify it under the terms of the GNU Library General Public
      8    License as published by the Free Software Foundation; either
      9    version 2 of the License, or (at your option) any later version.
     10
     11    This library is distributed in the hope that it will be useful,
     12    but WITHOUT ANY WARRANTY; without even the implied warranty of
     13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     14    Library General Public License for more details.
     15
     16    You should have received a copy of the GNU Library General Public
     17    License along with this library; if not, write to the Free
     18    Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
     19
     20    Richard Gooch may be reached by email at  rgooch@atnf.csiro.au
     21    The postal address is:
     22      Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
     23*/
     24#ifndef _UAPI_ASM_X86_MTRR_H
     25#define _UAPI_ASM_X86_MTRR_H
     26
     27#include <linux/types.h>
     28#include <linux/ioctl.h>
     29#include <linux/errno.h>
     30
     31#define	MTRR_IOCTL_BASE	'M'
     32
     33/* Warning: this structure has a different order from i386
     34   on x86-64. The 32bit emulation code takes care of that.
     35   But you need to use this for 64bit, otherwise your X server
     36   will break. */
     37
     38#ifdef __i386__
     39struct mtrr_sentry {
     40    unsigned long base;    /*  Base address     */
     41    unsigned int size;    /*  Size of region   */
     42    unsigned int type;     /*  Type of region   */
     43};
     44
     45struct mtrr_gentry {
     46    unsigned int regnum;   /*  Register number  */
     47    unsigned long base;    /*  Base address     */
     48    unsigned int size;    /*  Size of region   */
     49    unsigned int type;     /*  Type of region   */
     50};
     51
     52#else /* __i386__ */
     53
     54struct mtrr_sentry {
     55	__u64 base;		/*  Base address     */
     56	__u32 size;		/*  Size of region   */
     57	__u32 type;		/*  Type of region   */
     58};
     59
     60struct mtrr_gentry {
     61	__u64 base;		/*  Base address     */
     62	__u32 size;		/*  Size of region   */
     63	__u32 regnum;		/*  Register number  */
     64	__u32 type;		/*  Type of region   */
     65	__u32 _pad;		/*  Unused	     */
     66};
     67
     68#endif /* !__i386__ */
     69
     70struct mtrr_var_range {
     71	__u32 base_lo;
     72	__u32 base_hi;
     73	__u32 mask_lo;
     74	__u32 mask_hi;
     75};
     76
     77/* In the Intel processor's MTRR interface, the MTRR type is always held in
     78   an 8 bit field: */
     79typedef __u8 mtrr_type;
     80
     81#define MTRR_NUM_FIXED_RANGES 88
     82#define MTRR_MAX_VAR_RANGES 256
     83
     84struct mtrr_state_type {
     85	struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
     86	mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
     87	unsigned char enabled;
     88	unsigned char have_fixed;
     89	mtrr_type def_type;
     90};
     91
     92#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
     93#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
     94
     95/*  These are the various ioctls  */
     96#define MTRRIOC_ADD_ENTRY        _IOW(MTRR_IOCTL_BASE,  0, struct mtrr_sentry)
     97#define MTRRIOC_SET_ENTRY        _IOW(MTRR_IOCTL_BASE,  1, struct mtrr_sentry)
     98#define MTRRIOC_DEL_ENTRY        _IOW(MTRR_IOCTL_BASE,  2, struct mtrr_sentry)
     99#define MTRRIOC_GET_ENTRY        _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry)
    100#define MTRRIOC_KILL_ENTRY       _IOW(MTRR_IOCTL_BASE,  4, struct mtrr_sentry)
    101#define MTRRIOC_ADD_PAGE_ENTRY   _IOW(MTRR_IOCTL_BASE,  5, struct mtrr_sentry)
    102#define MTRRIOC_SET_PAGE_ENTRY   _IOW(MTRR_IOCTL_BASE,  6, struct mtrr_sentry)
    103#define MTRRIOC_DEL_PAGE_ENTRY   _IOW(MTRR_IOCTL_BASE,  7, struct mtrr_sentry)
    104#define MTRRIOC_GET_PAGE_ENTRY   _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry)
    105#define MTRRIOC_KILL_PAGE_ENTRY  _IOW(MTRR_IOCTL_BASE,  9, struct mtrr_sentry)
    106
    107/* MTRR memory types, which are defined in SDM */
    108#define MTRR_TYPE_UNCACHABLE 0
    109#define MTRR_TYPE_WRCOMB     1
    110/*#define MTRR_TYPE_         2*/
    111/*#define MTRR_TYPE_         3*/
    112#define MTRR_TYPE_WRTHROUGH  4
    113#define MTRR_TYPE_WRPROT     5
    114#define MTRR_TYPE_WRBACK     6
    115#define MTRR_NUM_TYPES       7
    116
    117/*
    118 * Invalid MTRR memory type.  mtrr_type_lookup() returns this value when
    119 * MTRRs are disabled.  Note, this value is allocated from the reserved
    120 * values (0x7-0xff) of the MTRR memory types.
    121 */
    122#define MTRR_TYPE_INVALID    0xff
    123
    124#endif /* _UAPI_ASM_X86_MTRR_H */