cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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apei.c (1254B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Arch-specific APEI-related functions.
      4 */
      5
      6#include <acpi/apei.h>
      7
      8#include <asm/mce.h>
      9#include <asm/tlbflush.h>
     10
     11int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data)
     12{
     13#ifdef CONFIG_X86_MCE
     14	int i;
     15	struct acpi_hest_ia_corrected *cmc;
     16	struct acpi_hest_ia_error_bank *mc_bank;
     17
     18	cmc = (struct acpi_hest_ia_corrected *)hest_hdr;
     19	if (!cmc->enabled)
     20		return 0;
     21
     22	/*
     23	 * We expect HEST to provide a list of MC banks that report errors
     24	 * in firmware first mode. Otherwise, return non-zero value to
     25	 * indicate that we are done parsing HEST.
     26	 */
     27	if (!(cmc->flags & ACPI_HEST_FIRMWARE_FIRST) ||
     28	    !cmc->num_hardware_banks)
     29		return 1;
     30
     31	pr_info("HEST: Enabling Firmware First mode for corrected errors.\n");
     32
     33	mc_bank = (struct acpi_hest_ia_error_bank *)(cmc + 1);
     34	for (i = 0; i < cmc->num_hardware_banks; i++, mc_bank++)
     35		mce_disable_bank(mc_bank->bank_number);
     36#endif
     37	return 1;
     38}
     39
     40void arch_apei_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
     41{
     42#ifdef CONFIG_X86_MCE
     43	apei_mce_report_mem_error(sev, mem_err);
     44#endif
     45}
     46
     47int arch_apei_report_x86_error(struct cper_ia_proc_ctx *ctx_info, u64 lapic_id)
     48{
     49	return apei_smca_report_x86_error(ctx_info, lapic_id);
     50}