cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cpu.h (2539B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef ARCH_X86_CPU_H
      3#define ARCH_X86_CPU_H
      4
      5/* attempt to consolidate cpu attributes */
      6struct cpu_dev {
      7	const char	*c_vendor;
      8
      9	/* some have two possibilities for cpuid string */
     10	const char	*c_ident[2];
     11
     12	void            (*c_early_init)(struct cpuinfo_x86 *);
     13	void		(*c_bsp_init)(struct cpuinfo_x86 *);
     14	void		(*c_init)(struct cpuinfo_x86 *);
     15	void		(*c_identify)(struct cpuinfo_x86 *);
     16	void		(*c_detect_tlb)(struct cpuinfo_x86 *);
     17	int		c_x86_vendor;
     18#ifdef CONFIG_X86_32
     19	/* Optional vendor specific routine to obtain the cache size. */
     20	unsigned int	(*legacy_cache_size)(struct cpuinfo_x86 *,
     21					     unsigned int);
     22
     23	/* Family/stepping-based lookup table for model names. */
     24	struct legacy_cpu_model_info {
     25		int		family;
     26		const char	*model_names[16];
     27	}		legacy_models[5];
     28#endif
     29};
     30
     31struct _tlb_table {
     32	unsigned char descriptor;
     33	char tlb_type;
     34	unsigned int entries;
     35	/* unsigned int ways; */
     36	char info[128];
     37};
     38
     39#define cpu_dev_register(cpu_devX) \
     40	static const struct cpu_dev *const __cpu_dev_##cpu_devX __used \
     41	__section(".x86_cpu_dev.init") = \
     42	&cpu_devX;
     43
     44extern const struct cpu_dev *const __x86_cpu_dev_start[],
     45			    *const __x86_cpu_dev_end[];
     46
     47#ifdef CONFIG_CPU_SUP_INTEL
     48enum tsx_ctrl_states {
     49	TSX_CTRL_ENABLE,
     50	TSX_CTRL_DISABLE,
     51	TSX_CTRL_RTM_ALWAYS_ABORT,
     52	TSX_CTRL_NOT_SUPPORTED,
     53};
     54
     55extern __ro_after_init enum tsx_ctrl_states tsx_ctrl_state;
     56
     57extern void __init tsx_init(void);
     58void tsx_ap_init(void);
     59#else
     60static inline void tsx_init(void) { }
     61static inline void tsx_ap_init(void) { }
     62#endif /* CONFIG_CPU_SUP_INTEL */
     63
     64extern void get_cpu_cap(struct cpuinfo_x86 *c);
     65extern void get_cpu_address_sizes(struct cpuinfo_x86 *c);
     66extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
     67extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
     68extern void init_intel_cacheinfo(struct cpuinfo_x86 *c);
     69extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
     70extern void init_hygon_cacheinfo(struct cpuinfo_x86 *c);
     71
     72extern void detect_num_cpu_cores(struct cpuinfo_x86 *c);
     73extern int detect_extended_topology_early(struct cpuinfo_x86 *c);
     74extern int detect_extended_topology(struct cpuinfo_x86 *c);
     75extern int detect_ht_early(struct cpuinfo_x86 *c);
     76extern void detect_ht(struct cpuinfo_x86 *c);
     77extern void check_null_seg_clears_base(struct cpuinfo_x86 *c);
     78
     79unsigned int aperfmperf_get_khz(int cpu);
     80
     81extern void x86_spec_ctrl_setup_ap(void);
     82extern void update_srbds_msr(void);
     83
     84extern u64 x86_read_arch_cap_msr(void);
     85
     86#endif /* ARCH_X86_CPU_H */