cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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proc.c (4541B)


      1// SPDX-License-Identifier: GPL-2.0
      2#include <linux/smp.h>
      3#include <linux/timex.h>
      4#include <linux/string.h>
      5#include <linux/seq_file.h>
      6#include <linux/cpufreq.h>
      7
      8#include "cpu.h"
      9
     10#ifdef CONFIG_X86_VMX_FEATURE_NAMES
     11extern const char * const x86_vmx_flags[NVMXINTS*32];
     12#endif
     13
     14/*
     15 *	Get CPU information for use by the procfs.
     16 */
     17static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
     18			      unsigned int cpu)
     19{
     20#ifdef CONFIG_SMP
     21	seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
     22	seq_printf(m, "siblings\t: %d\n",
     23		   cpumask_weight(topology_core_cpumask(cpu)));
     24	seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
     25	seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
     26	seq_printf(m, "apicid\t\t: %d\n", c->apicid);
     27	seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid);
     28#endif
     29}
     30
     31#ifdef CONFIG_X86_32
     32static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
     33{
     34	seq_printf(m,
     35		   "fdiv_bug\t: %s\n"
     36		   "f00f_bug\t: %s\n"
     37		   "coma_bug\t: %s\n"
     38		   "fpu\t\t: %s\n"
     39		   "fpu_exception\t: %s\n"
     40		   "cpuid level\t: %d\n"
     41		   "wp\t\t: yes\n",
     42		   boot_cpu_has_bug(X86_BUG_FDIV) ? "yes" : "no",
     43		   boot_cpu_has_bug(X86_BUG_F00F) ? "yes" : "no",
     44		   boot_cpu_has_bug(X86_BUG_COMA) ? "yes" : "no",
     45		   boot_cpu_has(X86_FEATURE_FPU) ? "yes" : "no",
     46		   boot_cpu_has(X86_FEATURE_FPU) ? "yes" : "no",
     47		   c->cpuid_level);
     48}
     49#else
     50static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
     51{
     52	seq_printf(m,
     53		   "fpu\t\t: yes\n"
     54		   "fpu_exception\t: yes\n"
     55		   "cpuid level\t: %d\n"
     56		   "wp\t\t: yes\n",
     57		   c->cpuid_level);
     58}
     59#endif
     60
     61static int show_cpuinfo(struct seq_file *m, void *v)
     62{
     63	struct cpuinfo_x86 *c = v;
     64	unsigned int cpu;
     65	int i;
     66
     67	cpu = c->cpu_index;
     68	seq_printf(m, "processor\t: %u\n"
     69		   "vendor_id\t: %s\n"
     70		   "cpu family\t: %d\n"
     71		   "model\t\t: %u\n"
     72		   "model name\t: %s\n",
     73		   cpu,
     74		   c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
     75		   c->x86,
     76		   c->x86_model,
     77		   c->x86_model_id[0] ? c->x86_model_id : "unknown");
     78
     79	if (c->x86_stepping || c->cpuid_level >= 0)
     80		seq_printf(m, "stepping\t: %d\n", c->x86_stepping);
     81	else
     82		seq_puts(m, "stepping\t: unknown\n");
     83	if (c->microcode)
     84		seq_printf(m, "microcode\t: 0x%x\n", c->microcode);
     85
     86	if (cpu_has(c, X86_FEATURE_TSC)) {
     87		unsigned int freq = arch_freq_get_on_cpu(cpu);
     88
     89		seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, (freq % 1000));
     90	}
     91
     92	/* Cache size */
     93	if (c->x86_cache_size)
     94		seq_printf(m, "cache size\t: %u KB\n", c->x86_cache_size);
     95
     96	show_cpuinfo_core(m, c, cpu);
     97	show_cpuinfo_misc(m, c);
     98
     99	seq_puts(m, "flags\t\t:");
    100	for (i = 0; i < 32*NCAPINTS; i++)
    101		if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
    102			seq_printf(m, " %s", x86_cap_flags[i]);
    103
    104#ifdef CONFIG_X86_VMX_FEATURE_NAMES
    105	if (cpu_has(c, X86_FEATURE_VMX) && c->vmx_capability[0]) {
    106		seq_puts(m, "\nvmx flags\t:");
    107		for (i = 0; i < 32*NVMXINTS; i++) {
    108			if (test_bit(i, (unsigned long *)c->vmx_capability) &&
    109			    x86_vmx_flags[i] != NULL)
    110				seq_printf(m, " %s", x86_vmx_flags[i]);
    111		}
    112	}
    113#endif
    114
    115	seq_puts(m, "\nbugs\t\t:");
    116	for (i = 0; i < 32*NBUGINTS; i++) {
    117		unsigned int bug_bit = 32*NCAPINTS + i;
    118
    119		if (cpu_has_bug(c, bug_bit) && x86_bug_flags[i])
    120			seq_printf(m, " %s", x86_bug_flags[i]);
    121	}
    122
    123	seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
    124		   c->loops_per_jiffy/(500000/HZ),
    125		   (c->loops_per_jiffy/(5000/HZ)) % 100);
    126
    127#ifdef CONFIG_X86_64
    128	if (c->x86_tlbsize > 0)
    129		seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
    130#endif
    131	seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size);
    132	seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
    133	seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
    134		   c->x86_phys_bits, c->x86_virt_bits);
    135
    136	seq_puts(m, "power management:");
    137	for (i = 0; i < 32; i++) {
    138		if (c->x86_power & (1 << i)) {
    139			if (i < ARRAY_SIZE(x86_power_flags) &&
    140			    x86_power_flags[i])
    141				seq_printf(m, "%s%s",
    142					   x86_power_flags[i][0] ? " " : "",
    143					   x86_power_flags[i]);
    144			else
    145				seq_printf(m, " [%d]", i);
    146		}
    147	}
    148
    149	seq_puts(m, "\n\n");
    150
    151	return 0;
    152}
    153
    154static void *c_start(struct seq_file *m, loff_t *pos)
    155{
    156	*pos = cpumask_next(*pos - 1, cpu_online_mask);
    157	if ((*pos) < nr_cpu_ids)
    158		return &cpu_data(*pos);
    159	return NULL;
    160}
    161
    162static void *c_next(struct seq_file *m, void *v, loff_t *pos)
    163{
    164	(*pos)++;
    165	return c_start(m, pos);
    166}
    167
    168static void c_stop(struct seq_file *m, void *v)
    169{
    170}
    171
    172const struct seq_operations cpuinfo_op = {
    173	.start	= c_start,
    174	.next	= c_next,
    175	.stop	= c_stop,
    176	.show	= show_cpuinfo,
    177};