cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sta2x11-fixup.c (6670B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * DMA translation between STA2x11 AMBA memory mapping and the x86 memory mapping
      4 *
      5 * ST Microelectronics ConneXt (STA2X11/STA2X10)
      6 *
      7 * Copyright (c) 2010-2011 Wind River Systems, Inc.
      8 */
      9
     10#include <linux/pci.h>
     11#include <linux/pci_ids.h>
     12#include <linux/export.h>
     13#include <linux/list.h>
     14#include <linux/dma-map-ops.h>
     15#include <linux/swiotlb.h>
     16#include <asm/iommu.h>
     17
     18#define STA2X11_SWIOTLB_SIZE (4*1024*1024)
     19
     20/*
     21 * We build a list of bus numbers that are under the ConneXt. The
     22 * main bridge hosts 4 busses, which are the 4 endpoints, in order.
     23 */
     24#define STA2X11_NR_EP		4	/* 0..3 included */
     25#define STA2X11_NR_FUNCS	8	/* 0..7 included */
     26#define STA2X11_AMBA_SIZE	(512 << 20)
     27
     28struct sta2x11_ahb_regs { /* saved during suspend */
     29	u32 base, pexlbase, pexhbase, crw;
     30};
     31
     32struct sta2x11_mapping {
     33	int is_suspended;
     34	struct sta2x11_ahb_regs regs[STA2X11_NR_FUNCS];
     35};
     36
     37struct sta2x11_instance {
     38	struct list_head list;
     39	int bus0;
     40	struct sta2x11_mapping map[STA2X11_NR_EP];
     41};
     42
     43static LIST_HEAD(sta2x11_instance_list);
     44
     45/* At probe time, record new instances of this bridge (likely one only) */
     46static void sta2x11_new_instance(struct pci_dev *pdev)
     47{
     48	struct sta2x11_instance *instance;
     49
     50	instance = kzalloc(sizeof(*instance), GFP_ATOMIC);
     51	if (!instance)
     52		return;
     53	/* This has a subordinate bridge, with 4 more-subordinate ones */
     54	instance->bus0 = pdev->subordinate->number + 1;
     55
     56	if (list_empty(&sta2x11_instance_list)) {
     57		int size = STA2X11_SWIOTLB_SIZE;
     58		/* First instance: register your own swiotlb area */
     59		dev_info(&pdev->dev, "Using SWIOTLB (size %i)\n", size);
     60		if (swiotlb_init_late(size, GFP_DMA, NULL))
     61			dev_emerg(&pdev->dev, "init swiotlb failed\n");
     62	}
     63	list_add(&instance->list, &sta2x11_instance_list);
     64}
     65DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, 0xcc17, sta2x11_new_instance);
     66
     67/*
     68 * Utility functions used in this file from below
     69 */
     70static struct sta2x11_instance *sta2x11_pdev_to_instance(struct pci_dev *pdev)
     71{
     72	struct sta2x11_instance *instance;
     73	int ep;
     74
     75	list_for_each_entry(instance, &sta2x11_instance_list, list) {
     76		ep = pdev->bus->number - instance->bus0;
     77		if (ep >= 0 && ep < STA2X11_NR_EP)
     78			return instance;
     79	}
     80	return NULL;
     81}
     82
     83static int sta2x11_pdev_to_ep(struct pci_dev *pdev)
     84{
     85	struct sta2x11_instance *instance;
     86
     87	instance = sta2x11_pdev_to_instance(pdev);
     88	if (!instance)
     89		return -1;
     90
     91	return pdev->bus->number - instance->bus0;
     92}
     93
     94/* This is exported, as some devices need to access the MFD registers */
     95struct sta2x11_instance *sta2x11_get_instance(struct pci_dev *pdev)
     96{
     97	return sta2x11_pdev_to_instance(pdev);
     98}
     99EXPORT_SYMBOL(sta2x11_get_instance);
    100
    101/* At setup time, we use our own ops if the device is a ConneXt one */
    102static void sta2x11_setup_pdev(struct pci_dev *pdev)
    103{
    104	struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev);
    105
    106	if (!instance) /* either a sta2x11 bridge or another ST device */
    107		return;
    108
    109	/* We must enable all devices as master, for audio DMA to work */
    110	pci_set_master(pdev);
    111}
    112DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_setup_pdev);
    113
    114/*
    115 * At boot we must set up the mappings for the pcie-to-amba bridge.
    116 * It involves device access, and the same happens at suspend/resume time
    117 */
    118
    119#define AHB_MAPB		0xCA4
    120#define AHB_CRW(i)		(AHB_MAPB + 0  + (i) * 0x10)
    121#define AHB_CRW_SZMASK			0xfffffc00UL
    122#define AHB_CRW_ENABLE			(1 << 0)
    123#define AHB_CRW_WTYPE_MEM		(2 << 1)
    124#define AHB_CRW_ROE			(1UL << 3)	/* Relax Order Ena */
    125#define AHB_CRW_NSE			(1UL << 4)	/* No Snoop Enable */
    126#define AHB_BASE(i)		(AHB_MAPB + 4  + (i) * 0x10)
    127#define AHB_PEXLBASE(i)		(AHB_MAPB + 8  + (i) * 0x10)
    128#define AHB_PEXHBASE(i)		(AHB_MAPB + 12 + (i) * 0x10)
    129
    130/* At probe time, enable mapping for each endpoint, using the pdev */
    131static void sta2x11_map_ep(struct pci_dev *pdev)
    132{
    133	struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev);
    134	struct device *dev = &pdev->dev;
    135	u32 amba_base, max_amba_addr;
    136	int i, ret;
    137
    138	if (!instance)
    139		return;
    140
    141	pci_read_config_dword(pdev, AHB_BASE(0), &amba_base);
    142	max_amba_addr = amba_base + STA2X11_AMBA_SIZE - 1;
    143
    144	ret = dma_direct_set_offset(dev, 0, amba_base, STA2X11_AMBA_SIZE);
    145	if (ret)
    146		dev_err(dev, "sta2x11: could not set DMA offset\n");
    147
    148	dev->bus_dma_limit = max_amba_addr;
    149	dma_set_mask_and_coherent(&pdev->dev, max_amba_addr);
    150
    151	/* Configure AHB mapping */
    152	pci_write_config_dword(pdev, AHB_PEXLBASE(0), 0);
    153	pci_write_config_dword(pdev, AHB_PEXHBASE(0), 0);
    154	pci_write_config_dword(pdev, AHB_CRW(0), STA2X11_AMBA_SIZE |
    155			       AHB_CRW_WTYPE_MEM | AHB_CRW_ENABLE);
    156
    157	/* Disable all the other windows */
    158	for (i = 1; i < STA2X11_NR_FUNCS; i++)
    159		pci_write_config_dword(pdev, AHB_CRW(i), 0);
    160
    161	dev_info(&pdev->dev,
    162		 "sta2x11: Map EP %i: AMBA address %#8x-%#8x\n",
    163		 sta2x11_pdev_to_ep(pdev), amba_base, max_amba_addr);
    164}
    165DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_map_ep);
    166
    167#ifdef CONFIG_PM /* Some register values must be saved and restored */
    168
    169static struct sta2x11_mapping *sta2x11_pdev_to_mapping(struct pci_dev *pdev)
    170{
    171	struct sta2x11_instance *instance;
    172	int ep;
    173
    174	instance = sta2x11_pdev_to_instance(pdev);
    175	if (!instance)
    176		return NULL;
    177	ep = sta2x11_pdev_to_ep(pdev);
    178	return instance->map + ep;
    179}
    180
    181static void suspend_mapping(struct pci_dev *pdev)
    182{
    183	struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);
    184	int i;
    185
    186	if (!map)
    187		return;
    188
    189	if (map->is_suspended)
    190		return;
    191	map->is_suspended = 1;
    192
    193	/* Save all window configs */
    194	for (i = 0; i < STA2X11_NR_FUNCS; i++) {
    195		struct sta2x11_ahb_regs *regs = map->regs + i;
    196
    197		pci_read_config_dword(pdev, AHB_BASE(i), &regs->base);
    198		pci_read_config_dword(pdev, AHB_PEXLBASE(i), &regs->pexlbase);
    199		pci_read_config_dword(pdev, AHB_PEXHBASE(i), &regs->pexhbase);
    200		pci_read_config_dword(pdev, AHB_CRW(i), &regs->crw);
    201	}
    202}
    203DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, suspend_mapping);
    204
    205static void resume_mapping(struct pci_dev *pdev)
    206{
    207	struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);
    208	int i;
    209
    210	if (!map)
    211		return;
    212
    213
    214	if (!map->is_suspended)
    215		goto out;
    216	map->is_suspended = 0;
    217
    218	/* Restore all window configs */
    219	for (i = 0; i < STA2X11_NR_FUNCS; i++) {
    220		struct sta2x11_ahb_regs *regs = map->regs + i;
    221
    222		pci_write_config_dword(pdev, AHB_BASE(i), regs->base);
    223		pci_write_config_dword(pdev, AHB_PEXLBASE(i), regs->pexlbase);
    224		pci_write_config_dword(pdev, AHB_PEXHBASE(i), regs->pexhbase);
    225		pci_write_config_dword(pdev, AHB_CRW(i), regs->crw);
    226	}
    227out:
    228	pci_set_master(pdev); /* Like at boot, enable master on all devices */
    229}
    230DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, resume_mapping);
    231
    232#endif /* CONFIG_PM */