cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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Kconfig (1084B)


      1# SPDX-License-Identifier: GPL-2.0
      2
      3menu "Host processor type and features"
      4
      5source "arch/x86/Kconfig.cpu"
      6
      7endmenu
      8
      9config UML_X86
     10	def_bool y
     11	select ARCH_BINFMT_ELF_EXTRA_PHDRS if X86_32
     12	select DCACHE_WORD_ACCESS
     13
     14config 64BIT
     15	bool "64-bit kernel" if "$(SUBARCH)" = "x86"
     16	default "$(SUBARCH)" != "i386"
     17
     18config X86_32
     19	def_bool !64BIT
     20	select ARCH_32BIT_OFF_T
     21	select ARCH_WANT_IPC_PARSE_VERSION
     22	select MODULES_USE_ELF_REL
     23	select CLONE_BACKWARDS
     24	select OLD_SIGSUSPEND3
     25	select OLD_SIGACTION
     26
     27config X86_64
     28	def_bool 64BIT
     29	select MODULES_USE_ELF_RELA
     30
     31config 3_LEVEL_PGTABLES
     32	bool "Three-level pagetables" if !64BIT
     33	default 64BIT
     34	help
     35	Three-level pagetables will let UML have more than 4G of physical
     36	memory.  All the memory that can't be mapped directly will be treated
     37	as high memory.
     38
     39	However, this it experimental on 32-bit architectures, so if unsure say
     40	N (on x86-64 it's automatically enabled, instead, as it's safe there).
     41
     42config ARCH_HAS_SC_SIGNALS
     43	def_bool !64BIT
     44
     45config ARCH_REUSE_HOST_VSYSCALL_AREA
     46	def_bool !64BIT
     47
     48config GENERIC_HWEIGHT
     49	def_bool y