cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

vectors.h (3276B)


      1/*
      2 * arch/xtensa/include/asm/xchal_vaddr_remap.h
      3 *
      4 * Xtensa macros for MMU V3 Support. Deals with re-mapping the Virtual
      5 * Memory Addresses from "Virtual == Physical" to their prevvious V2 MMU
      6 * mappings (KSEG at 0xD0000000 and KIO at 0XF0000000).
      7 *
      8 * This file is subject to the terms and conditions of the GNU General Public
      9 * License.  See the file "COPYING" in the main directory of this archive
     10 * for more details.
     11 *
     12 * Copyright (C) 2008 - 2012 Tensilica Inc.
     13 *
     14 * Pete Delaney <piet@tensilica.com>
     15 * Marc Gauthier <marc@tensilica.com
     16 */
     17
     18#ifndef _XTENSA_VECTORS_H
     19#define _XTENSA_VECTORS_H
     20
     21#include <asm/core.h>
     22#include <asm/kmem_layout.h>
     23
     24#if defined(CONFIG_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
     25#ifdef CONFIG_KERNEL_VIRTUAL_ADDRESS
     26#define KERNELOFFSET			CONFIG_KERNEL_VIRTUAL_ADDRESS
     27#else
     28#define KERNELOFFSET			(CONFIG_KERNEL_LOAD_ADDRESS + \
     29					 XCHAL_KSEG_CACHED_VADDR - \
     30					 XCHAL_KSEG_PADDR)
     31#endif
     32#else
     33#define KERNELOFFSET			CONFIG_KERNEL_LOAD_ADDRESS
     34#endif
     35
     36#define RESET_VECTOR1_VADDR		(XCHAL_RESET_VECTOR1_VADDR)
     37#ifdef CONFIG_VECTORS_ADDR
     38#define VECBASE_VADDR			(CONFIG_VECTORS_ADDR)
     39#else
     40#define VECBASE_VADDR			_vecbase
     41#endif
     42
     43#if XCHAL_HAVE_VECBASE
     44
     45#define VECTOR_VADDR(offset)		(VECBASE_VADDR + offset)
     46
     47#define USER_VECTOR_VADDR		VECTOR_VADDR(XCHAL_USER_VECOFS)
     48#define KERNEL_VECTOR_VADDR		VECTOR_VADDR(XCHAL_KERNEL_VECOFS)
     49#define DOUBLEEXC_VECTOR_VADDR		VECTOR_VADDR(XCHAL_DOUBLEEXC_VECOFS)
     50#define WINDOW_VECTORS_VADDR		VECTOR_VADDR(XCHAL_WINDOW_OF4_VECOFS)
     51#define INTLEVEL2_VECTOR_VADDR		VECTOR_VADDR(XCHAL_INTLEVEL2_VECOFS)
     52#define INTLEVEL3_VECTOR_VADDR		VECTOR_VADDR(XCHAL_INTLEVEL3_VECOFS)
     53#define INTLEVEL4_VECTOR_VADDR		VECTOR_VADDR(XCHAL_INTLEVEL4_VECOFS)
     54#define INTLEVEL5_VECTOR_VADDR		VECTOR_VADDR(XCHAL_INTLEVEL5_VECOFS)
     55#define INTLEVEL6_VECTOR_VADDR		VECTOR_VADDR(XCHAL_INTLEVEL6_VECOFS)
     56#define INTLEVEL7_VECTOR_VADDR		VECTOR_VADDR(XCHAL_INTLEVEL7_VECOFS)
     57#define DEBUG_VECTOR_VADDR		VECTOR_VADDR(XCHAL_DEBUG_VECOFS)
     58
     59/*
     60 * These XCHAL_* #defines from varian/core.h
     61 * are not valid to use with V3 MMU. Non-XCHAL
     62 * constants are defined above and should be used.
     63 */
     64#undef  XCHAL_VECBASE_RESET_VADDR
     65#undef  XCHAL_USER_VECTOR_VADDR
     66#undef  XCHAL_KERNEL_VECTOR_VADDR
     67#undef  XCHAL_DOUBLEEXC_VECTOR_VADDR
     68#undef  XCHAL_WINDOW_VECTORS_VADDR
     69#undef  XCHAL_INTLEVEL2_VECTOR_VADDR
     70#undef  XCHAL_INTLEVEL3_VECTOR_VADDR
     71#undef  XCHAL_INTLEVEL4_VECTOR_VADDR
     72#undef  XCHAL_INTLEVEL5_VECTOR_VADDR
     73#undef  XCHAL_INTLEVEL6_VECTOR_VADDR
     74#undef  XCHAL_INTLEVEL7_VECTOR_VADDR
     75#undef  XCHAL_DEBUG_VECTOR_VADDR
     76
     77#else
     78
     79#define USER_VECTOR_VADDR		XCHAL_USER_VECTOR_VADDR
     80#define KERNEL_VECTOR_VADDR		XCHAL_KERNEL_VECTOR_VADDR
     81#define DOUBLEEXC_VECTOR_VADDR		XCHAL_DOUBLEEXC_VECTOR_VADDR
     82#define WINDOW_VECTORS_VADDR		XCHAL_WINDOW_VECTORS_VADDR
     83#define INTLEVEL2_VECTOR_VADDR		XCHAL_INTLEVEL2_VECTOR_VADDR
     84#define INTLEVEL3_VECTOR_VADDR		XCHAL_INTLEVEL3_VECTOR_VADDR
     85#define INTLEVEL4_VECTOR_VADDR		XCHAL_INTLEVEL4_VECTOR_VADDR
     86#define INTLEVEL5_VECTOR_VADDR		XCHAL_INTLEVEL5_VECTOR_VADDR
     87#define INTLEVEL6_VECTOR_VADDR		XCHAL_INTLEVEL6_VECTOR_VADDR
     88#define INTLEVEL7_VECTOR_VADDR		XCHAL_INTLEVEL6_VECTOR_VADDR
     89#define DEBUG_VECTOR_VADDR		XCHAL_DEBUG_VECTOR_VADDR
     90
     91#endif
     92
     93#endif /* _XTENSA_VECTORS_H */