cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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speakup_decpc.c (14827B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * This is the DECtalk PC speakup driver
      4 *
      5 * Some constants from DEC's DOS driver:
      6 *      Copyright (c) by Digital Equipment Corp.
      7 *
      8 * 386BSD DECtalk PC driver:
      9 *      Copyright (c) 1996 Brian Buhrow <buhrow@lothlorien.nfbcal.org>
     10 *
     11 * Linux DECtalk PC driver:
     12 *      Copyright (c) 1997 Nicolas Pitre <nico@cam.org>
     13 *
     14 * speakup DECtalk PC Internal driver:
     15 *      Copyright (c) 2003 David Borowski <david575@golden.net>
     16 *
     17 * All rights reserved.
     18 */
     19#include <linux/jiffies.h>
     20#include <linux/sched.h>
     21#include <linux/timer.h>
     22#include <linux/kthread.h>
     23
     24#include "spk_priv.h"
     25#include "speakup.h"
     26
     27#define	MODULE_init		0x0dec	/* module in boot code */
     28#define	MODULE_self_test	0x8800	/* module in self-test */
     29#define	MODULE_reset		0xffff	/* reinit the whole module */
     30
     31#define	MODE_mask		0xf000	/* mode bits in high nibble */
     32#define	MODE_null		0x0000
     33#define	MODE_test		0x2000	/* in testing mode */
     34#define	MODE_status		0x8000
     35#define	STAT_int		0x0001	/* running in interrupt mode */
     36#define	STAT_tr_char		0x0002	/* character data to transmit */
     37#define	STAT_rr_char		0x0004	/* ready to receive char data */
     38#define	STAT_cmd_ready		0x0008	/* ready to accept commands */
     39#define	STAT_dma_ready		0x0010	/* dma command ready */
     40#define	STAT_digitized		0x0020	/* spc in digitized mode */
     41#define	STAT_new_index		0x0040	/* new last index ready */
     42#define	STAT_new_status		0x0080	/* new status posted */
     43#define	STAT_dma_state		0x0100	/* dma state toggle */
     44#define	STAT_index_valid	0x0200	/* indexs are valid */
     45#define	STAT_flushing		0x0400	/* flush in progress */
     46#define	STAT_self_test		0x0800	/* module in self test */
     47#define	MODE_ready		0xc000	/* module ready for next phase */
     48#define	READY_boot		0x0000
     49#define	READY_kernel		0x0001
     50#define	MODE_error		0xf000
     51
     52#define	CMD_mask		0xf000	/* mask for command nibble */
     53#define	CMD_null		0x0000	/* post status */
     54#define	CMD_control		0x1000	/* hard control command */
     55#define	CTRL_mask		0x0F00	/* mask off control nibble */
     56#define	CTRL_data		0x00FF	/* mask to get data byte */
     57#define	CTRL_null		0x0000	/* null control */
     58#define	CTRL_vol_up		0x0100	/* increase volume */
     59#define	CTRL_vol_down		0x0200	/* decrease volume */
     60#define	CTRL_vol_set		0x0300	/* set volume */
     61#define	CTRL_pause		0x0400	/* pause spc */
     62#define	CTRL_resume		0x0500	/* resume spc clock */
     63#define	CTRL_resume_spc		0x0001	/* resume spc soft pause */
     64#define	CTRL_flush		0x0600	/* flush all buffers */
     65#define	CTRL_int_enable		0x0700	/* enable status change ints */
     66#define	CTRL_buff_free		0x0800	/* buffer remain count */
     67#define	CTRL_buff_used		0x0900	/* buffer in use */
     68#define	CTRL_speech		0x0a00	/* immediate speech change */
     69#define	CTRL_SP_voice		0x0001	/* voice change */
     70#define	CTRL_SP_rate		0x0002	/* rate change */
     71#define	CTRL_SP_comma		0x0003	/* comma pause change */
     72#define	CTRL_SP_period		0x0004	/* period pause change */
     73#define	CTRL_SP_rate_delta	0x0005	/* delta rate change */
     74#define	CTRL_SP_get_param	0x0006	/* return the desired parameter */
     75#define	CTRL_last_index		0x0b00	/* get last index spoken */
     76#define	CTRL_io_priority	0x0c00	/* change i/o priority */
     77#define	CTRL_free_mem		0x0d00	/* get free paragraphs on module */
     78#define	CTRL_get_lang		0x0e00	/* return bitmask of loaded languages */
     79#define	CMD_test		0x2000	/* self-test request */
     80#define	TEST_mask		0x0F00	/* isolate test field */
     81#define	TEST_null		0x0000	/* no test requested */
     82#define	TEST_isa_int		0x0100	/* assert isa irq */
     83#define	TEST_echo		0x0200	/* make data in == data out */
     84#define	TEST_seg		0x0300	/* set peek/poke segment */
     85#define	TEST_off		0x0400	/* set peek/poke offset */
     86#define	TEST_peek		0x0500	/* data out == *peek */
     87#define	TEST_poke		0x0600	/* *peek == data in */
     88#define	TEST_sub_code		0x00FF	/* user defined test sub codes */
     89#define	CMD_id			0x3000	/* return software id */
     90#define	ID_null			0x0000	/* null id */
     91#define	ID_kernel		0x0100	/* kernel code executing */
     92#define	ID_boot			0x0200	/* boot code executing */
     93#define	CMD_dma			0x4000	/* force a dma start */
     94#define	CMD_reset		0x5000	/* reset module status */
     95#define	CMD_sync		0x6000	/* kernel sync command */
     96#define	CMD_char_in		0x7000	/* single character send */
     97#define	CMD_char_out		0x8000	/* single character get */
     98#define	CHAR_count_1		0x0100	/* one char in cmd_low */
     99#define	CHAR_count_2		0x0200	/* the second in data_low */
    100#define	CHAR_count_3		0x0300	/* the third in data_high */
    101#define	CMD_spc_mode		0x9000	/* change spc mode */
    102#define	CMD_spc_to_text		0x0100	/* set to text mode */
    103#define	CMD_spc_to_digit	0x0200	/* set to digital mode */
    104#define	CMD_spc_rate		0x0400	/* change spc data rate */
    105#define	CMD_error		0xf000	/* severe error */
    106
    107enum {	PRIMARY_DIC	= 0, USER_DIC, COMMAND_DIC, ABBREV_DIC };
    108
    109#define	DMA_single_in		0x01
    110#define	DMA_single_out		0x02
    111#define	DMA_buff_in		0x03
    112#define	DMA_buff_out		0x04
    113#define	DMA_control		0x05
    114#define	DT_MEM_ALLOC		0x03
    115#define	DT_SET_DIC		0x04
    116#define	DT_START_TASK		0x05
    117#define	DT_LOAD_MEM		0x06
    118#define	DT_READ_MEM		0x07
    119#define	DT_DIGITAL_IN		0x08
    120#define	DMA_sync		0x06
    121#define	DMA_sync_char		0x07
    122
    123#define DRV_VERSION "2.12"
    124#define PROCSPEECH 0x0b
    125#define SYNTH_IO_EXTENT 8
    126
    127static int synth_probe(struct spk_synth *synth);
    128static void dtpc_release(struct spk_synth *synth);
    129static const char *synth_immediate(struct spk_synth *synth, const char *buf);
    130static void do_catch_up(struct spk_synth *synth);
    131static void synth_flush(struct spk_synth *synth);
    132
    133static int synth_portlist[] = { 0x340, 0x350, 0x240, 0x250, 0 };
    134static int in_escape, is_flushing;
    135static int dt_stat, dma_state;
    136
    137static struct var_t vars[] = {
    138	{ CAPS_START, .u.s = {"[:dv ap 200]" } },
    139	{ CAPS_STOP, .u.s = {"[:dv ap 100]" } },
    140	{ RATE, .u.n = {"[:ra %d]", 9, 0, 18, 150, 25, NULL } },
    141	{ PITCH, .u.n = {"[:dv ap %d]", 80, 0, 100, 20, 0, NULL } },
    142	{ INFLECTION, .u.n = {"[:dv pr %d] ", 100, 0, 10000, 0, 0, NULL } },
    143	{ VOL, .u.n = {"[:vo se %d]", 5, 0, 9, 5, 10, NULL } },
    144	{ PUNCT, .u.n = {"[:pu %c]", 0, 0, 2, 0, 0, "nsa" } },
    145	{ VOICE, .u.n = {"[:n%c]", 0, 0, 9, 0, 0, "phfdburwkv" } },
    146	{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
    147	V_LAST_VAR
    148};
    149
    150/*
    151 * These attributes will appear in /sys/accessibility/speakup/decpc.
    152 */
    153static struct kobj_attribute caps_start_attribute =
    154	__ATTR(caps_start, 0644, spk_var_show, spk_var_store);
    155static struct kobj_attribute caps_stop_attribute =
    156	__ATTR(caps_stop, 0644, spk_var_show, spk_var_store);
    157static struct kobj_attribute pitch_attribute =
    158	__ATTR(pitch, 0644, spk_var_show, spk_var_store);
    159static struct kobj_attribute inflection_attribute =
    160	__ATTR(inflection, 0644, spk_var_show, spk_var_store);
    161static struct kobj_attribute punct_attribute =
    162	__ATTR(punct, 0644, spk_var_show, spk_var_store);
    163static struct kobj_attribute rate_attribute =
    164	__ATTR(rate, 0644, spk_var_show, spk_var_store);
    165static struct kobj_attribute voice_attribute =
    166	__ATTR(voice, 0644, spk_var_show, spk_var_store);
    167static struct kobj_attribute vol_attribute =
    168	__ATTR(vol, 0644, spk_var_show, spk_var_store);
    169
    170static struct kobj_attribute delay_time_attribute =
    171	__ATTR(delay_time, 0644, spk_var_show, spk_var_store);
    172static struct kobj_attribute direct_attribute =
    173	__ATTR(direct, 0644, spk_var_show, spk_var_store);
    174static struct kobj_attribute full_time_attribute =
    175	__ATTR(full_time, 0644, spk_var_show, spk_var_store);
    176static struct kobj_attribute jiffy_delta_attribute =
    177	__ATTR(jiffy_delta, 0644, spk_var_show, spk_var_store);
    178static struct kobj_attribute trigger_time_attribute =
    179	__ATTR(trigger_time, 0644, spk_var_show, spk_var_store);
    180
    181/*
    182 * Create a group of attributes so that we can create and destroy them all
    183 * at once.
    184 */
    185static struct attribute *synth_attrs[] = {
    186	&caps_start_attribute.attr,
    187	&caps_stop_attribute.attr,
    188	&pitch_attribute.attr,
    189	&inflection_attribute.attr,
    190	&punct_attribute.attr,
    191	&rate_attribute.attr,
    192	&voice_attribute.attr,
    193	&vol_attribute.attr,
    194	&delay_time_attribute.attr,
    195	&direct_attribute.attr,
    196	&full_time_attribute.attr,
    197	&jiffy_delta_attribute.attr,
    198	&trigger_time_attribute.attr,
    199	NULL,	/* need to NULL terminate the list of attributes */
    200};
    201
    202static struct spk_synth synth_dec_pc = {
    203	.name = "decpc",
    204	.version = DRV_VERSION,
    205	.long_name = "Dectalk PC",
    206	.init = "[:pe -380]",
    207	.procspeech = PROCSPEECH,
    208	.delay = 500,
    209	.trigger = 50,
    210	.jiffies = 50,
    211	.full = 1000,
    212	.flags = SF_DEC,
    213	.startup = SYNTH_START,
    214	.checkval = SYNTH_CHECK,
    215	.vars = vars,
    216	.io_ops = &spk_serial_io_ops,
    217	.probe = synth_probe,
    218	.release = dtpc_release,
    219	.synth_immediate = synth_immediate,
    220	.catch_up = do_catch_up,
    221	.flush = synth_flush,
    222	.is_alive = spk_synth_is_alive_nop,
    223	.synth_adjust = NULL,
    224	.read_buff_add = NULL,
    225	.get_index = NULL,
    226	.indexing = {
    227		.command = NULL,
    228		.lowindex = 0,
    229		.highindex = 0,
    230		.currindex = 0,
    231	},
    232	.attributes = {
    233		.attrs = synth_attrs,
    234		.name = "decpc",
    235	},
    236};
    237
    238static int dt_getstatus(void)
    239{
    240	dt_stat = inb_p(speakup_info.port_tts) |
    241		 (inb_p(speakup_info.port_tts + 1) << 8);
    242	return dt_stat;
    243}
    244
    245static void dt_sendcmd(u_int cmd)
    246{
    247	outb_p(cmd & 0xFF, speakup_info.port_tts);
    248	outb_p((cmd >> 8) & 0xFF, speakup_info.port_tts + 1);
    249}
    250
    251static int dt_waitbit(int bit)
    252{
    253	int timeout = 100;
    254
    255	while (--timeout > 0) {
    256		if ((dt_getstatus() & bit) == bit)
    257			return 1;
    258		udelay(50);
    259	}
    260	return 0;
    261}
    262
    263static int dt_wait_dma(void)
    264{
    265	int timeout = 100, state = dma_state;
    266
    267	if (!dt_waitbit(STAT_dma_ready))
    268		return 0;
    269	while (--timeout > 0) {
    270		if ((dt_getstatus() & STAT_dma_state) == state)
    271			return 1;
    272		udelay(50);
    273	}
    274	dma_state = dt_getstatus() & STAT_dma_state;
    275	return 1;
    276}
    277
    278static int dt_ctrl(u_int cmd)
    279{
    280	int timeout = 10;
    281
    282	if (!dt_waitbit(STAT_cmd_ready))
    283		return -1;
    284	outb_p(0, speakup_info.port_tts + 2);
    285	outb_p(0, speakup_info.port_tts + 3);
    286	dt_getstatus();
    287	dt_sendcmd(CMD_control | cmd);
    288	outb_p(0, speakup_info.port_tts + 6);
    289	while (dt_getstatus() & STAT_cmd_ready) {
    290		udelay(20);
    291		if (--timeout == 0)
    292			break;
    293	}
    294	dt_sendcmd(CMD_null);
    295	return 0;
    296}
    297
    298static void synth_flush(struct spk_synth *synth)
    299{
    300	int timeout = 10;
    301
    302	if (is_flushing)
    303		return;
    304	is_flushing = 4;
    305	in_escape = 0;
    306	while (dt_ctrl(CTRL_flush)) {
    307		if (--timeout == 0)
    308			break;
    309		udelay(50);
    310	}
    311	for (timeout = 0; timeout < 10; timeout++) {
    312		if (dt_waitbit(STAT_dma_ready))
    313			break;
    314		udelay(50);
    315	}
    316	outb_p(DMA_sync, speakup_info.port_tts + 4);
    317	outb_p(0, speakup_info.port_tts + 4);
    318	udelay(100);
    319	for (timeout = 0; timeout < 10; timeout++) {
    320		if (!(dt_getstatus() & STAT_flushing))
    321			break;
    322		udelay(50);
    323	}
    324	dma_state = dt_getstatus() & STAT_dma_state;
    325	dma_state ^= STAT_dma_state;
    326	is_flushing = 0;
    327}
    328
    329static int dt_sendchar(char ch)
    330{
    331	if (!dt_wait_dma())
    332		return -1;
    333	if (!(dt_stat & STAT_rr_char))
    334		return -2;
    335	outb_p(DMA_single_in, speakup_info.port_tts + 4);
    336	outb_p(ch, speakup_info.port_tts + 4);
    337	dma_state ^= STAT_dma_state;
    338	return 0;
    339}
    340
    341static int testkernel(void)
    342{
    343	int status = 0;
    344
    345	if (dt_getstatus() == 0xffff) {
    346		status = -1;
    347		goto oops;
    348	}
    349	dt_sendcmd(CMD_sync);
    350	if (!dt_waitbit(STAT_cmd_ready))
    351		status = -2;
    352	else if (dt_stat & 0x8000)
    353		return 0;
    354	else if (dt_stat == 0x0dec)
    355		pr_warn("dec_pc at 0x%x, software not loaded\n",
    356			speakup_info.port_tts);
    357	status = -3;
    358oops:	synth_release_region(speakup_info.port_tts, SYNTH_IO_EXTENT);
    359	speakup_info.port_tts = 0;
    360	return status;
    361}
    362
    363static void do_catch_up(struct spk_synth *synth)
    364{
    365	u_char ch;
    366	static u_char last;
    367	unsigned long flags;
    368	unsigned long jiff_max;
    369	struct var_t *jiffy_delta;
    370	struct var_t *delay_time;
    371	int jiffy_delta_val;
    372	int delay_time_val;
    373
    374	jiffy_delta = spk_get_var(JIFFY);
    375	delay_time = spk_get_var(DELAY);
    376	spin_lock_irqsave(&speakup_info.spinlock, flags);
    377	jiffy_delta_val = jiffy_delta->u.n.value;
    378	spin_unlock_irqrestore(&speakup_info.spinlock, flags);
    379	jiff_max = jiffies + jiffy_delta_val;
    380
    381	while (!kthread_should_stop()) {
    382		spin_lock_irqsave(&speakup_info.spinlock, flags);
    383		if (speakup_info.flushing) {
    384			speakup_info.flushing = 0;
    385			spin_unlock_irqrestore(&speakup_info.spinlock, flags);
    386			synth->flush(synth);
    387			continue;
    388		}
    389		synth_buffer_skip_nonlatin1();
    390		if (synth_buffer_empty()) {
    391			spin_unlock_irqrestore(&speakup_info.spinlock, flags);
    392			break;
    393		}
    394		ch = synth_buffer_peek();
    395		set_current_state(TASK_INTERRUPTIBLE);
    396		delay_time_val = delay_time->u.n.value;
    397		spin_unlock_irqrestore(&speakup_info.spinlock, flags);
    398		if (ch == '\n')
    399			ch = 0x0D;
    400		if (dt_sendchar(ch)) {
    401			schedule_timeout(msecs_to_jiffies(delay_time_val));
    402			continue;
    403		}
    404		set_current_state(TASK_RUNNING);
    405		spin_lock_irqsave(&speakup_info.spinlock, flags);
    406		synth_buffer_getc();
    407		spin_unlock_irqrestore(&speakup_info.spinlock, flags);
    408		if (ch == '[') {
    409			in_escape = 1;
    410		} else if (ch == ']') {
    411			in_escape = 0;
    412		} else if (ch <= SPACE) {
    413			if (!in_escape && strchr(",.!?;:", last))
    414				dt_sendchar(PROCSPEECH);
    415			if (time_after_eq(jiffies, jiff_max)) {
    416				if (!in_escape)
    417					dt_sendchar(PROCSPEECH);
    418				spin_lock_irqsave(&speakup_info.spinlock,
    419						  flags);
    420				jiffy_delta_val = jiffy_delta->u.n.value;
    421				delay_time_val = delay_time->u.n.value;
    422				spin_unlock_irqrestore(&speakup_info.spinlock,
    423						       flags);
    424				schedule_timeout(msecs_to_jiffies
    425						 (delay_time_val));
    426				jiff_max = jiffies + jiffy_delta_val;
    427			}
    428		}
    429		last = ch;
    430		ch = 0;
    431	}
    432	if (!in_escape)
    433		dt_sendchar(PROCSPEECH);
    434}
    435
    436static const char *synth_immediate(struct spk_synth *synth, const char *buf)
    437{
    438	u_char ch;
    439
    440	while ((ch = *buf)) {
    441		if (ch == '\n')
    442			ch = PROCSPEECH;
    443		if (dt_sendchar(ch))
    444			return buf;
    445		buf++;
    446	}
    447	return NULL;
    448}
    449
    450static int synth_probe(struct spk_synth *synth)
    451{
    452	int i = 0, failed = 0;
    453
    454	pr_info("Probing for %s.\n", synth->long_name);
    455	for (i = 0; synth_portlist[i]; i++) {
    456		if (synth_request_region(synth_portlist[i], SYNTH_IO_EXTENT)) {
    457			pr_warn("request_region: failed with 0x%x, %d\n",
    458				synth_portlist[i], SYNTH_IO_EXTENT);
    459			continue;
    460		}
    461		speakup_info.port_tts = synth_portlist[i];
    462		failed = testkernel();
    463		if (failed == 0)
    464			break;
    465	}
    466	if (failed) {
    467		pr_info("%s: not found\n", synth->long_name);
    468		return -ENODEV;
    469	}
    470	pr_info("%s: %03x-%03x, Driver Version %s,\n", synth->long_name,
    471		speakup_info.port_tts, speakup_info.port_tts + 7,
    472		synth->version);
    473	synth->alive = 1;
    474	return 0;
    475}
    476
    477static void dtpc_release(struct spk_synth *synth)
    478{
    479	spk_stop_serial_interrupt();
    480	if (speakup_info.port_tts)
    481		synth_release_region(speakup_info.port_tts, SYNTH_IO_EXTENT);
    482	speakup_info.port_tts = 0;
    483}
    484
    485module_param_named(start, synth_dec_pc.startup, short, 0444);
    486
    487MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
    488
    489module_spk_synth(synth_dec_pc);
    490
    491MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
    492MODULE_AUTHOR("David Borowski");
    493MODULE_DESCRIPTION("Speakup support for DECtalk PC synthesizers");
    494MODULE_LICENSE("GPL");
    495MODULE_VERSION(DRV_VERSION);