cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pata_cypress.c (4556B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * pata_cypress.c 	- Cypress PATA for new ATA layer
      4 *			  (C) 2006 Red Hat Inc
      5 *			  Alan Cox
      6 *
      7 * Based heavily on
      8 * linux/drivers/ide/pci/cy82c693.c		Version 0.40	Sep. 10, 2002
      9 *
     10 */
     11
     12#include <linux/kernel.h>
     13#include <linux/module.h>
     14#include <linux/pci.h>
     15#include <linux/blkdev.h>
     16#include <linux/delay.h>
     17#include <scsi/scsi_host.h>
     18#include <linux/libata.h>
     19
     20#define DRV_NAME "pata_cypress"
     21#define DRV_VERSION "0.1.5"
     22
     23/* here are the offset definitions for the registers */
     24
     25enum {
     26	CY82_IDE_CMDREG		= 0x04,
     27	CY82_IDE_ADDRSETUP	= 0x48,
     28	CY82_IDE_MASTER_IOR	= 0x4C,
     29	CY82_IDE_MASTER_IOW	= 0x4D,
     30	CY82_IDE_SLAVE_IOR	= 0x4E,
     31	CY82_IDE_SLAVE_IOW	= 0x4F,
     32	CY82_IDE_MASTER_8BIT	= 0x50,
     33	CY82_IDE_SLAVE_8BIT	= 0x51,
     34
     35	CY82_INDEX_PORT		= 0x22,
     36	CY82_DATA_PORT		= 0x23,
     37
     38	CY82_INDEX_CTRLREG1	= 0x01,
     39	CY82_INDEX_CHANNEL0	= 0x30,
     40	CY82_INDEX_CHANNEL1	= 0x31,
     41	CY82_INDEX_TIMEOUT	= 0x32
     42};
     43
     44static bool enable_dma = true;
     45module_param(enable_dma, bool, 0);
     46MODULE_PARM_DESC(enable_dma, "Enable bus master DMA operations");
     47
     48/**
     49 *	cy82c693_set_piomode	-	set initial PIO mode data
     50 *	@ap: ATA interface
     51 *	@adev: ATA device
     52 *
     53 *	Called to do the PIO mode setup.
     54 */
     55
     56static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
     57{
     58	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
     59	struct ata_timing t;
     60	const unsigned long T = 1000000 / 33;
     61	short time_16, time_8;
     62	u32 addr;
     63
     64	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) {
     65		ata_dev_err(adev, DRV_NAME ": mome computation failed.\n");
     66		return;
     67	}
     68
     69	time_16 = clamp_val(t.recover - 1, 0, 15) |
     70		  (clamp_val(t.active - 1, 0, 15) << 4);
     71	time_8 = clamp_val(t.act8b - 1, 0, 15) |
     72		 (clamp_val(t.rec8b - 1, 0, 15) << 4);
     73
     74	if (adev->devno == 0) {
     75		pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
     76
     77		addr &= ~0x0F;	/* Mask bits */
     78		addr |= clamp_val(t.setup - 1, 0, 15);
     79
     80		pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
     81		pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
     82		pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16);
     83		pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8);
     84	} else {
     85		pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
     86
     87		addr &= ~0xF0;	/* Mask bits */
     88		addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
     89
     90		pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
     91		pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
     92		pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16);
     93		pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8);
     94	}
     95}
     96
     97/**
     98 *	cy82c693_set_dmamode	-	set initial DMA mode data
     99 *	@ap: ATA interface
    100 *	@adev: ATA device
    101 *
    102 *	Called to do the DMA mode setup.
    103 */
    104
    105static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev)
    106{
    107	int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
    108
    109	/* Be afraid, be very afraid. Magic registers  in low I/O space */
    110	outb(reg, 0x22);
    111	outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
    112
    113	/* 0x50 gives the best behaviour on the Alpha's using this chip */
    114	outb(CY82_INDEX_TIMEOUT, 0x22);
    115	outb(0x50, 0x23);
    116}
    117
    118static struct scsi_host_template cy82c693_sht = {
    119	ATA_BMDMA_SHT(DRV_NAME),
    120};
    121
    122static struct ata_port_operations cy82c693_port_ops = {
    123	.inherits	= &ata_bmdma_port_ops,
    124	.cable_detect	= ata_cable_40wire,
    125	.set_piomode	= cy82c693_set_piomode,
    126	.set_dmamode	= cy82c693_set_dmamode,
    127};
    128
    129static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
    130{
    131	static struct ata_port_info info = {
    132		.flags = ATA_FLAG_SLAVE_POSS,
    133		.pio_mask = ATA_PIO4,
    134		.port_ops = &cy82c693_port_ops
    135	};
    136	const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
    137
    138	if (enable_dma)
    139		info.mwdma_mask = ATA_MWDMA2;
    140
    141	/* Devfn 1 is the ATA primary. The secondary is magic and on devfn2.
    142	   For the moment we don't handle the secondary. FIXME */
    143
    144	if (PCI_FUNC(pdev->devfn) != 1)
    145		return -ENODEV;
    146
    147	return ata_pci_bmdma_init_one(pdev, ppi, &cy82c693_sht, NULL, 0);
    148}
    149
    150static const struct pci_device_id cy82c693[] = {
    151	{ PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), },
    152
    153	{ },
    154};
    155
    156static struct pci_driver cy82c693_pci_driver = {
    157	.name 		= DRV_NAME,
    158	.id_table	= cy82c693,
    159	.probe 		= cy82c693_init_one,
    160	.remove		= ata_pci_remove_one,
    161#ifdef CONFIG_PM_SLEEP
    162	.suspend	= ata_pci_device_suspend,
    163	.resume		= ata_pci_device_resume,
    164#endif
    165};
    166
    167module_pci_driver(cy82c693_pci_driver);
    168
    169MODULE_AUTHOR("Alan Cox");
    170MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller");
    171MODULE_LICENSE("GPL");
    172MODULE_DEVICE_TABLE(pci, cy82c693);
    173MODULE_VERSION(DRV_VERSION);