cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pata_ns87410.c (4162B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * pata_ns87410.c 	- National Semiconductor 87410 PATA for new ATA layer
      4 *			  (C) 2006 Red Hat Inc
      5 */
      6
      7#include <linux/kernel.h>
      8#include <linux/module.h>
      9#include <linux/pci.h>
     10#include <linux/blkdev.h>
     11#include <linux/delay.h>
     12#include <scsi/scsi_host.h>
     13#include <linux/libata.h>
     14
     15#define DRV_NAME "pata_ns87410"
     16#define DRV_VERSION "0.4.6"
     17
     18/**
     19 *	ns87410_pre_reset		-	probe begin
     20 *	@link: ATA link
     21 *	@deadline: deadline jiffies for the operation
     22 *
     23 *	Check enabled ports
     24 */
     25
     26static int ns87410_pre_reset(struct ata_link *link, unsigned long deadline)
     27{
     28	struct ata_port *ap = link->ap;
     29	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
     30	static const struct pci_bits ns87410_enable_bits[] = {
     31		{ 0x43, 1, 0x08, 0x08 },
     32		{ 0x47, 1, 0x08, 0x08 }
     33	};
     34
     35	if (!pci_test_config_bits(pdev, &ns87410_enable_bits[ap->port_no]))
     36		return -ENOENT;
     37
     38	return ata_sff_prereset(link, deadline);
     39}
     40
     41/**
     42 *	ns87410_set_piomode	-	set initial PIO mode data
     43 *	@ap: ATA interface
     44 *	@adev: ATA device
     45 *
     46 *	Program timing data. This is kept per channel not per device,
     47 *	and only affects the data port.
     48 */
     49
     50static void ns87410_set_piomode(struct ata_port *ap, struct ata_device *adev)
     51{
     52	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
     53	int port = 0x40 + 4 * ap->port_no;
     54	u8 idetcr, idefr;
     55	struct ata_timing at;
     56
     57	static const u8 activebits[15] = {
     58		0, 1, 2, 3, 4,
     59		5, 5, 6, 6, 6,
     60		6, 7, 7, 7, 7
     61	};
     62
     63	static const u8 recoverbits[12] = {
     64		0, 1, 2, 3, 4, 5, 6, 6, 7, 7, 7, 7
     65	};
     66
     67	pci_read_config_byte(pdev, port + 3, &idefr);
     68
     69	if (ata_pio_need_iordy(adev))
     70		idefr |= 0x04;	/* IORDY enable */
     71	else
     72		idefr &= ~0x04;
     73
     74	if (ata_timing_compute(adev, adev->pio_mode, &at, 30303, 1) < 0) {
     75		dev_err(&pdev->dev, "unknown mode %d\n", adev->pio_mode);
     76		return;
     77	}
     78
     79	at.active = clamp_val(at.active, 2, 16) - 2;
     80	at.setup = clamp_val(at.setup, 1, 4) - 1;
     81	at.recover = clamp_val(at.recover, 1, 12) - 1;
     82
     83	idetcr = (at.setup << 6) | (recoverbits[at.recover] << 3) | activebits[at.active];
     84
     85	pci_write_config_byte(pdev, port, idetcr);
     86	pci_write_config_byte(pdev, port + 3, idefr);
     87	/* We use ap->private_data as a pointer to the device currently
     88	   loaded for timing */
     89	ap->private_data = adev;
     90}
     91
     92/**
     93 *	ns87410_qc_issue	-	command issue
     94 *	@qc: command pending
     95 *
     96 *	Called when the libata layer is about to issue a command. We wrap
     97 *	this interface so that we can load the correct ATA timings if
     98 *	necessary.
     99 */
    100
    101static unsigned int ns87410_qc_issue(struct ata_queued_cmd *qc)
    102{
    103	struct ata_port *ap = qc->ap;
    104	struct ata_device *adev = qc->dev;
    105
    106	/* If modes have been configured and the channel data is not loaded
    107	   then load it. We have to check if pio_mode is set as the core code
    108	   does not set adev->pio_mode to XFER_PIO_0 while probing as would be
    109	   logical */
    110
    111	if (adev->pio_mode && adev != ap->private_data)
    112		ns87410_set_piomode(ap, adev);
    113
    114	return ata_sff_qc_issue(qc);
    115}
    116
    117static struct scsi_host_template ns87410_sht = {
    118	ATA_PIO_SHT(DRV_NAME),
    119};
    120
    121static struct ata_port_operations ns87410_port_ops = {
    122	.inherits	= &ata_sff_port_ops,
    123	.qc_issue	= ns87410_qc_issue,
    124	.cable_detect	= ata_cable_40wire,
    125	.set_piomode	= ns87410_set_piomode,
    126	.prereset	= ns87410_pre_reset,
    127};
    128
    129static int ns87410_init_one(struct pci_dev *dev, const struct pci_device_id *id)
    130{
    131	static const struct ata_port_info info = {
    132		.flags = ATA_FLAG_SLAVE_POSS,
    133		.pio_mask = ATA_PIO3,
    134		.port_ops = &ns87410_port_ops
    135	};
    136	const struct ata_port_info *ppi[] = { &info, NULL };
    137	return ata_pci_sff_init_one(dev, ppi, &ns87410_sht, NULL, 0);
    138}
    139
    140static const struct pci_device_id ns87410[] = {
    141	{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), },
    142
    143	{ },
    144};
    145
    146static struct pci_driver ns87410_pci_driver = {
    147	.name 		= DRV_NAME,
    148	.id_table	= ns87410,
    149	.probe 		= ns87410_init_one,
    150	.remove		= ata_pci_remove_one,
    151#ifdef CONFIG_PM_SLEEP
    152	.suspend	= ata_pci_device_suspend,
    153	.resume		= ata_pci_device_resume,
    154#endif
    155};
    156
    157module_pci_driver(ns87410_pci_driver);
    158
    159MODULE_AUTHOR("Alan Cox");
    160MODULE_DESCRIPTION("low-level driver for Nat Semi 87410");
    161MODULE_LICENSE("GPL");
    162MODULE_DEVICE_TABLE(pci, ns87410);
    163MODULE_VERSION(DRV_VERSION);