cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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driver_chipcommon_b.c (1410B)

      1/*
      2 * Broadcom specific AMBA
      3 * ChipCommon B Unit driver
      4 *
      5 * Copyright 2014, Hauke Mehrtens <hauke@hauke-m.de>
      6 *
      7 * Licensed under the GNU/GPL. See COPYING for details.
      8 */
      9
     10#include "bcma_private.h"
     11#include <linux/export.h>
     12#include <linux/bcma/bcma.h>
     13
     14static bool bcma_wait_reg(struct bcma_bus *bus, void __iomem *addr, u32 mask,
     15			  u32 value, int timeout)
     16{
     17	unsigned long deadline = jiffies + timeout;
     18	u32 val;
     19
     20	do {
     21		val = readl(addr);
     22		if ((val & mask) == value)
     23			return true;
     24		cpu_relax();
     25		udelay(10);
     26	} while (!time_after_eq(jiffies, deadline));
     27
     28	bcma_err(bus, "Timeout waiting for register %p\n", addr);
     29
     30	return false;
     31}
     32
     33void bcma_chipco_b_mii_write(struct bcma_drv_cc_b *ccb, u32 offset, u32 value)
     34{
     35	struct bcma_bus *bus = ccb->core->bus;
     36	void __iomem *mii = ccb->mii;
     37
     38	writel(offset, mii + BCMA_CCB_MII_MNG_CTL);
     39	bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
     40	writel(value, mii + BCMA_CCB_MII_MNG_CMD_DATA);
     41	bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
     42}
     43EXPORT_SYMBOL_GPL(bcma_chipco_b_mii_write);
     44
     45int bcma_core_chipcommon_b_init(struct bcma_drv_cc_b *ccb)
     46{
     47	if (ccb->setup_done)
     48		return 0;
     49
     50	ccb->setup_done = 1;
     51	ccb->mii = ioremap(ccb->core->addr_s[1], BCMA_CORE_SIZE);
     52	if (!ccb->mii)
     53		return -ENOMEM;
     54
     55	return 0;
     56}
     57
     58void bcma_core_chipcommon_b_free(struct bcma_drv_cc_b *ccb)
     59{
     60	if (ccb->mii)
     61		iounmap(ccb->mii);
     62}