cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

bcm2835-rng.c (5247B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (c) 2010-2012 Broadcom. All rights reserved.
      4 * Copyright (c) 2013 Lubomir Rintel
      5 */
      6
      7#include <linux/hw_random.h>
      8#include <linux/io.h>
      9#include <linux/kernel.h>
     10#include <linux/module.h>
     11#include <linux/of_address.h>
     12#include <linux/of_platform.h>
     13#include <linux/platform_device.h>
     14#include <linux/printk.h>
     15#include <linux/clk.h>
     16#include <linux/reset.h>
     17
     18#define RNG_CTRL	0x0
     19#define RNG_STATUS	0x4
     20#define RNG_DATA	0x8
     21#define RNG_INT_MASK	0x10
     22
     23/* enable rng */
     24#define RNG_RBGEN	0x1
     25
     26/* the initial numbers generated are "less random" so will be discarded */
     27#define RNG_WARMUP_COUNT 0x40000
     28
     29#define RNG_INT_OFF	0x1
     30
     31struct bcm2835_rng_priv {
     32	struct hwrng rng;
     33	void __iomem *base;
     34	bool mask_interrupts;
     35	struct clk *clk;
     36	struct reset_control *reset;
     37};
     38
     39static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng)
     40{
     41	return container_of(rng, struct bcm2835_rng_priv, rng);
     42}
     43
     44static inline u32 rng_readl(struct bcm2835_rng_priv *priv, u32 offset)
     45{
     46	/* MIPS chips strapped for BE will automagically configure the
     47	 * peripheral registers for CPU-native byte order.
     48	 */
     49	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
     50		return __raw_readl(priv->base + offset);
     51	else
     52		return readl(priv->base + offset);
     53}
     54
     55static inline void rng_writel(struct bcm2835_rng_priv *priv, u32 val,
     56			      u32 offset)
     57{
     58	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
     59		__raw_writel(val, priv->base + offset);
     60	else
     61		writel(val, priv->base + offset);
     62}
     63
     64static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max,
     65			       bool wait)
     66{
     67	struct bcm2835_rng_priv *priv = to_rng_priv(rng);
     68	u32 max_words = max / sizeof(u32);
     69	u32 num_words, count;
     70
     71	while ((rng_readl(priv, RNG_STATUS) >> 24) == 0) {
     72		if (!wait)
     73			return 0;
     74		cpu_relax();
     75	}
     76
     77	num_words = rng_readl(priv, RNG_STATUS) >> 24;
     78	if (num_words > max_words)
     79		num_words = max_words;
     80
     81	for (count = 0; count < num_words; count++)
     82		((u32 *)buf)[count] = rng_readl(priv, RNG_DATA);
     83
     84	return num_words * sizeof(u32);
     85}
     86
     87static int bcm2835_rng_init(struct hwrng *rng)
     88{
     89	struct bcm2835_rng_priv *priv = to_rng_priv(rng);
     90	int ret = 0;
     91	u32 val;
     92
     93	ret = clk_prepare_enable(priv->clk);
     94	if (ret)
     95		return ret;
     96
     97	ret = reset_control_reset(priv->reset);
     98	if (ret)
     99		return ret;
    100
    101	if (priv->mask_interrupts) {
    102		/* mask the interrupt */
    103		val = rng_readl(priv, RNG_INT_MASK);
    104		val |= RNG_INT_OFF;
    105		rng_writel(priv, val, RNG_INT_MASK);
    106	}
    107
    108	/* set warm-up count & enable */
    109	rng_writel(priv, RNG_WARMUP_COUNT, RNG_STATUS);
    110	rng_writel(priv, RNG_RBGEN, RNG_CTRL);
    111
    112	return ret;
    113}
    114
    115static void bcm2835_rng_cleanup(struct hwrng *rng)
    116{
    117	struct bcm2835_rng_priv *priv = to_rng_priv(rng);
    118
    119	/* disable rng hardware */
    120	rng_writel(priv, 0, RNG_CTRL);
    121
    122	clk_disable_unprepare(priv->clk);
    123}
    124
    125struct bcm2835_rng_of_data {
    126	bool mask_interrupts;
    127};
    128
    129static const struct bcm2835_rng_of_data nsp_rng_of_data = {
    130	.mask_interrupts = true,
    131};
    132
    133static const struct of_device_id bcm2835_rng_of_match[] = {
    134	{ .compatible = "brcm,bcm2835-rng"},
    135	{ .compatible = "brcm,bcm-nsp-rng", .data = &nsp_rng_of_data },
    136	{ .compatible = "brcm,bcm5301x-rng", .data = &nsp_rng_of_data },
    137	{ .compatible = "brcm,bcm6368-rng"},
    138	{},
    139};
    140
    141static int bcm2835_rng_probe(struct platform_device *pdev)
    142{
    143	const struct bcm2835_rng_of_data *of_data;
    144	struct device *dev = &pdev->dev;
    145	const struct of_device_id *rng_id;
    146	struct bcm2835_rng_priv *priv;
    147	int err;
    148
    149	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
    150	if (!priv)
    151		return -ENOMEM;
    152
    153	platform_set_drvdata(pdev, priv);
    154
    155	/* map peripheral */
    156	priv->base = devm_platform_ioremap_resource(pdev, 0);
    157	if (IS_ERR(priv->base))
    158		return PTR_ERR(priv->base);
    159
    160	/* Clock is optional on most platforms */
    161	priv->clk = devm_clk_get_optional(dev, NULL);
    162	if (IS_ERR(priv->clk))
    163		return PTR_ERR(priv->clk);
    164
    165	priv->reset = devm_reset_control_get_optional_exclusive(dev, NULL);
    166	if (IS_ERR(priv->reset))
    167		return PTR_ERR(priv->reset);
    168
    169	priv->rng.name = pdev->name;
    170	priv->rng.init = bcm2835_rng_init;
    171	priv->rng.read = bcm2835_rng_read;
    172	priv->rng.cleanup = bcm2835_rng_cleanup;
    173
    174	if (dev_of_node(dev)) {
    175		rng_id = of_match_node(bcm2835_rng_of_match, dev->of_node);
    176		if (!rng_id)
    177			return -EINVAL;
    178
    179		/* Check for rng init function, execute it */
    180		of_data = rng_id->data;
    181		if (of_data)
    182			priv->mask_interrupts = of_data->mask_interrupts;
    183	}
    184
    185	/* register driver */
    186	err = devm_hwrng_register(dev, &priv->rng);
    187	if (err)
    188		dev_err(dev, "hwrng registration failed\n");
    189	else
    190		dev_info(dev, "hwrng registered\n");
    191
    192	return err;
    193}
    194
    195MODULE_DEVICE_TABLE(of, bcm2835_rng_of_match);
    196
    197static const struct platform_device_id bcm2835_rng_devtype[] = {
    198	{ .name = "bcm2835-rng" },
    199	{ .name = "bcm63xx-rng" },
    200	{ /* sentinel */ }
    201};
    202MODULE_DEVICE_TABLE(platform, bcm2835_rng_devtype);
    203
    204static struct platform_driver bcm2835_rng_driver = {
    205	.driver = {
    206		.name = "bcm2835-rng",
    207		.of_match_table = bcm2835_rng_of_match,
    208	},
    209	.probe		= bcm2835_rng_probe,
    210	.id_table	= bcm2835_rng_devtype,
    211};
    212module_platform_driver(bcm2835_rng_driver);
    213
    214MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
    215MODULE_DESCRIPTION("BCM2835 Random Number Generator (RNG) driver");
    216MODULE_LICENSE("GPL v2");