cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

pic32-rng.c (3194B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * PIC32 RNG driver
      4 *
      5 * Joshua Henderson <joshua.henderson@microchip.com>
      6 * Copyright (C) 2016 Microchip Technology Inc.  All rights reserved.
      7 */
      8
      9#include <linux/clk.h>
     10#include <linux/clkdev.h>
     11#include <linux/err.h>
     12#include <linux/hw_random.h>
     13#include <linux/io.h>
     14#include <linux/kernel.h>
     15#include <linux/module.h>
     16#include <linux/of.h>
     17#include <linux/of_device.h>
     18#include <linux/platform_device.h>
     19#include <linux/slab.h>
     20
     21#define RNGCON		0x04
     22#define  TRNGEN		BIT(8)
     23#define  PRNGEN		BIT(9)
     24#define  PRNGCONT	BIT(10)
     25#define  TRNGMOD	BIT(11)
     26#define  SEEDLOAD	BIT(12)
     27#define RNGPOLY1	0x08
     28#define RNGPOLY2	0x0C
     29#define RNGNUMGEN1	0x10
     30#define RNGNUMGEN2	0x14
     31#define RNGSEED1	0x18
     32#define RNGSEED2	0x1C
     33#define RNGRCNT		0x20
     34#define  RCNT_MASK	0x7F
     35
     36struct pic32_rng {
     37	void __iomem	*base;
     38	struct hwrng	rng;
     39	struct clk	*clk;
     40};
     41
     42/*
     43 * The TRNG can generate up to 24Mbps. This is a timeout that should be safe
     44 * enough given the instructions in the loop and that the TRNG may not always
     45 * be at maximum rate.
     46 */
     47#define RNG_TIMEOUT 500
     48
     49static int pic32_rng_read(struct hwrng *rng, void *buf, size_t max,
     50			  bool wait)
     51{
     52	struct pic32_rng *priv = container_of(rng, struct pic32_rng, rng);
     53	u64 *data = buf;
     54	u32 t;
     55	unsigned int timeout = RNG_TIMEOUT;
     56
     57	do {
     58		t = readl(priv->base + RNGRCNT) & RCNT_MASK;
     59		if (t == 64) {
     60			/* TRNG value comes through the seed registers */
     61			*data = ((u64)readl(priv->base + RNGSEED2) << 32) +
     62				readl(priv->base + RNGSEED1);
     63			return 8;
     64		}
     65	} while (wait && --timeout);
     66
     67	return -EIO;
     68}
     69
     70static int pic32_rng_probe(struct platform_device *pdev)
     71{
     72	struct pic32_rng *priv;
     73	u32 v;
     74	int ret;
     75
     76	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
     77	if (!priv)
     78		return -ENOMEM;
     79
     80	priv->base = devm_platform_ioremap_resource(pdev, 0);
     81	if (IS_ERR(priv->base))
     82		return PTR_ERR(priv->base);
     83
     84	priv->clk = devm_clk_get(&pdev->dev, NULL);
     85	if (IS_ERR(priv->clk))
     86		return PTR_ERR(priv->clk);
     87
     88	ret = clk_prepare_enable(priv->clk);
     89	if (ret)
     90		return ret;
     91
     92	/* enable TRNG in enhanced mode */
     93	v = TRNGEN | TRNGMOD;
     94	writel(v, priv->base + RNGCON);
     95
     96	priv->rng.name = pdev->name;
     97	priv->rng.read = pic32_rng_read;
     98
     99	ret = devm_hwrng_register(&pdev->dev, &priv->rng);
    100	if (ret)
    101		goto err_register;
    102
    103	platform_set_drvdata(pdev, priv);
    104
    105	return 0;
    106
    107err_register:
    108	clk_disable_unprepare(priv->clk);
    109	return ret;
    110}
    111
    112static int pic32_rng_remove(struct platform_device *pdev)
    113{
    114	struct pic32_rng *rng = platform_get_drvdata(pdev);
    115
    116	writel(0, rng->base + RNGCON);
    117	clk_disable_unprepare(rng->clk);
    118	return 0;
    119}
    120
    121static const struct of_device_id pic32_rng_of_match[] __maybe_unused = {
    122	{ .compatible	= "microchip,pic32mzda-rng", },
    123	{ /* sentinel */ }
    124};
    125MODULE_DEVICE_TABLE(of, pic32_rng_of_match);
    126
    127static struct platform_driver pic32_rng_driver = {
    128	.probe		= pic32_rng_probe,
    129	.remove		= pic32_rng_remove,
    130	.driver		= {
    131		.name	= "pic32-rng",
    132		.of_match_table = of_match_ptr(pic32_rng_of_match),
    133	},
    134};
    135
    136module_platform_driver(pic32_rng_driver);
    137
    138MODULE_LICENSE("GPL");
    139MODULE_AUTHOR("Joshua Henderson <joshua.henderson@microchip.com>");
    140MODULE_DESCRIPTION("Microchip PIC32 RNG Driver");