cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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stm32-rng.c (5081B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Copyright (c) 2015, Daniel Thompson
      4 */
      5
      6#include <linux/clk.h>
      7#include <linux/delay.h>
      8#include <linux/hw_random.h>
      9#include <linux/io.h>
     10#include <linux/iopoll.h>
     11#include <linux/kernel.h>
     12#include <linux/module.h>
     13#include <linux/of_address.h>
     14#include <linux/of_platform.h>
     15#include <linux/pm_runtime.h>
     16#include <linux/reset.h>
     17#include <linux/slab.h>
     18
     19#define RNG_CR 0x00
     20#define RNG_CR_RNGEN BIT(2)
     21#define RNG_CR_CED BIT(5)
     22
     23#define RNG_SR 0x04
     24#define RNG_SR_SEIS BIT(6)
     25#define RNG_SR_CEIS BIT(5)
     26#define RNG_SR_DRDY BIT(0)
     27
     28#define RNG_DR 0x08
     29
     30struct stm32_rng_private {
     31	struct hwrng rng;
     32	void __iomem *base;
     33	struct clk *clk;
     34	struct reset_control *rst;
     35	bool ced;
     36};
     37
     38static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
     39{
     40	struct stm32_rng_private *priv =
     41	    container_of(rng, struct stm32_rng_private, rng);
     42	u32 sr;
     43	int retval = 0;
     44
     45	pm_runtime_get_sync((struct device *) priv->rng.priv);
     46
     47	while (max > sizeof(u32)) {
     48		sr = readl_relaxed(priv->base + RNG_SR);
     49		/* Manage timeout which is based on timer and take */
     50		/* care of initial delay time when enabling rng	*/
     51		if (!sr && wait) {
     52			retval = readl_relaxed_poll_timeout_atomic(priv->base
     53								   + RNG_SR,
     54								   sr, sr,
     55								   10, 50000);
     56			if (retval)
     57				dev_err((struct device *)priv->rng.priv,
     58					"%s: timeout %x!\n", __func__, sr);
     59		}
     60
     61		/* If error detected or data not ready... */
     62		if (sr != RNG_SR_DRDY) {
     63			if (WARN_ONCE(sr & (RNG_SR_SEIS | RNG_SR_CEIS),
     64					"bad RNG status - %x\n", sr))
     65				writel_relaxed(0, priv->base + RNG_SR);
     66			break;
     67		}
     68
     69		*(u32 *)data = readl_relaxed(priv->base + RNG_DR);
     70
     71		retval += sizeof(u32);
     72		data += sizeof(u32);
     73		max -= sizeof(u32);
     74	}
     75
     76	pm_runtime_mark_last_busy((struct device *) priv->rng.priv);
     77	pm_runtime_put_sync_autosuspend((struct device *) priv->rng.priv);
     78
     79	return retval || !wait ? retval : -EIO;
     80}
     81
     82static int stm32_rng_init(struct hwrng *rng)
     83{
     84	struct stm32_rng_private *priv =
     85	    container_of(rng, struct stm32_rng_private, rng);
     86	int err;
     87
     88	err = clk_prepare_enable(priv->clk);
     89	if (err)
     90		return err;
     91
     92	if (priv->ced)
     93		writel_relaxed(RNG_CR_RNGEN, priv->base + RNG_CR);
     94	else
     95		writel_relaxed(RNG_CR_RNGEN | RNG_CR_CED,
     96			       priv->base + RNG_CR);
     97
     98	/* clear error indicators */
     99	writel_relaxed(0, priv->base + RNG_SR);
    100
    101	return 0;
    102}
    103
    104static void stm32_rng_cleanup(struct hwrng *rng)
    105{
    106	struct stm32_rng_private *priv =
    107	    container_of(rng, struct stm32_rng_private, rng);
    108
    109	writel_relaxed(0, priv->base + RNG_CR);
    110	clk_disable_unprepare(priv->clk);
    111}
    112
    113static int stm32_rng_probe(struct platform_device *ofdev)
    114{
    115	struct device *dev = &ofdev->dev;
    116	struct device_node *np = ofdev->dev.of_node;
    117	struct stm32_rng_private *priv;
    118	struct resource res;
    119	int err;
    120
    121	priv = devm_kzalloc(dev, sizeof(struct stm32_rng_private), GFP_KERNEL);
    122	if (!priv)
    123		return -ENOMEM;
    124
    125	err = of_address_to_resource(np, 0, &res);
    126	if (err)
    127		return err;
    128
    129	priv->base = devm_ioremap_resource(dev, &res);
    130	if (IS_ERR(priv->base))
    131		return PTR_ERR(priv->base);
    132
    133	priv->clk = devm_clk_get(&ofdev->dev, NULL);
    134	if (IS_ERR(priv->clk))
    135		return PTR_ERR(priv->clk);
    136
    137	priv->rst = devm_reset_control_get(&ofdev->dev, NULL);
    138	if (!IS_ERR(priv->rst)) {
    139		reset_control_assert(priv->rst);
    140		udelay(2);
    141		reset_control_deassert(priv->rst);
    142	}
    143
    144	priv->ced = of_property_read_bool(np, "clock-error-detect");
    145
    146	dev_set_drvdata(dev, priv);
    147
    148	priv->rng.name = dev_driver_string(dev);
    149#ifndef CONFIG_PM
    150	priv->rng.init = stm32_rng_init;
    151	priv->rng.cleanup = stm32_rng_cleanup;
    152#endif
    153	priv->rng.read = stm32_rng_read;
    154	priv->rng.priv = (unsigned long) dev;
    155	priv->rng.quality = 900;
    156
    157	pm_runtime_set_autosuspend_delay(dev, 100);
    158	pm_runtime_use_autosuspend(dev);
    159	pm_runtime_enable(dev);
    160
    161	return devm_hwrng_register(dev, &priv->rng);
    162}
    163
    164static int stm32_rng_remove(struct platform_device *ofdev)
    165{
    166	pm_runtime_disable(&ofdev->dev);
    167
    168	return 0;
    169}
    170
    171#ifdef CONFIG_PM
    172static int stm32_rng_runtime_suspend(struct device *dev)
    173{
    174	struct stm32_rng_private *priv = dev_get_drvdata(dev);
    175
    176	stm32_rng_cleanup(&priv->rng);
    177
    178	return 0;
    179}
    180
    181static int stm32_rng_runtime_resume(struct device *dev)
    182{
    183	struct stm32_rng_private *priv = dev_get_drvdata(dev);
    184
    185	return stm32_rng_init(&priv->rng);
    186}
    187#endif
    188
    189static const struct dev_pm_ops stm32_rng_pm_ops = {
    190	SET_RUNTIME_PM_OPS(stm32_rng_runtime_suspend,
    191			   stm32_rng_runtime_resume, NULL)
    192	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
    193				pm_runtime_force_resume)
    194};
    195
    196
    197static const struct of_device_id stm32_rng_match[] = {
    198	{
    199		.compatible = "st,stm32-rng",
    200	},
    201	{},
    202};
    203MODULE_DEVICE_TABLE(of, stm32_rng_match);
    204
    205static struct platform_driver stm32_rng_driver = {
    206	.driver = {
    207		.name = "stm32-rng",
    208		.pm = &stm32_rng_pm_ops,
    209		.of_match_table = stm32_rng_match,
    210	},
    211	.probe = stm32_rng_probe,
    212	.remove = stm32_rng_remove,
    213};
    214
    215module_platform_driver(stm32_rng_driver);
    216
    217MODULE_LICENSE("GPL");
    218MODULE_AUTHOR("Daniel Thompson <daniel.thompson@linaro.org>");
    219MODULE_DESCRIPTION("STMicroelectronics STM32 RNG device driver");