cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

clk-fsl-flexspi.c (2773B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Layerscape FlexSPI clock driver
      4 *
      5 * Copyright 2020 Michael Walle <michael@walle.cc>
      6 */
      7
      8#include <linux/clk-provider.h>
      9#include <linux/io.h>
     10#include <linux/module.h>
     11#include <linux/platform_device.h>
     12
     13static const struct clk_div_table ls1028a_flexspi_divs[] = {
     14	{ .val = 0, .div = 1, },
     15	{ .val = 1, .div = 2, },
     16	{ .val = 2, .div = 3, },
     17	{ .val = 3, .div = 4, },
     18	{ .val = 4, .div = 5, },
     19	{ .val = 5, .div = 6, },
     20	{ .val = 6, .div = 7, },
     21	{ .val = 7, .div = 8, },
     22	{ .val = 11, .div = 12, },
     23	{ .val = 15, .div = 16, },
     24	{ .val = 16, .div = 20, },
     25	{ .val = 17, .div = 24, },
     26	{ .val = 18, .div = 28, },
     27	{ .val = 19, .div = 32, },
     28	{ .val = 20, .div = 80, },
     29	{}
     30};
     31
     32static const struct clk_div_table lx2160a_flexspi_divs[] = {
     33	{ .val = 1, .div = 2, },
     34	{ .val = 3, .div = 4, },
     35	{ .val = 5, .div = 6, },
     36	{ .val = 7, .div = 8, },
     37	{ .val = 11, .div = 12, },
     38	{ .val = 15, .div = 16, },
     39	{ .val = 16, .div = 20, },
     40	{ .val = 17, .div = 24, },
     41	{ .val = 18, .div = 28, },
     42	{ .val = 19, .div = 32, },
     43	{ .val = 20, .div = 80, },
     44	{}
     45};
     46
     47static int fsl_flexspi_clk_probe(struct platform_device *pdev)
     48{
     49	struct device *dev = &pdev->dev;
     50	struct device_node *np = dev->of_node;
     51	const char *clk_name = np->name;
     52	const char *clk_parent;
     53	struct resource *res;
     54	void __iomem *reg;
     55	struct clk_hw *hw;
     56	const struct clk_div_table *divs;
     57
     58	divs = device_get_match_data(dev);
     59	if (!divs)
     60		return -ENOENT;
     61
     62	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
     63	if (!res)
     64		return -ENOENT;
     65
     66	/*
     67	 * Can't use devm_ioremap_resource() or devm_of_iomap() because the
     68	 * resource might already be taken by the parent device.
     69	 */
     70	reg = devm_ioremap(dev, res->start, resource_size(res));
     71	if (!reg)
     72		return -ENOMEM;
     73
     74	clk_parent = of_clk_get_parent_name(np, 0);
     75	if (!clk_parent)
     76		return -EINVAL;
     77
     78	of_property_read_string(np, "clock-output-names", &clk_name);
     79
     80	hw = devm_clk_hw_register_divider_table(dev, clk_name, clk_parent, 0,
     81						reg, 0, 5, 0, divs, NULL);
     82	if (IS_ERR(hw))
     83		return PTR_ERR(hw);
     84
     85	return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
     86}
     87
     88static const struct of_device_id fsl_flexspi_clk_dt_ids[] = {
     89	{ .compatible = "fsl,ls1028a-flexspi-clk", .data = &ls1028a_flexspi_divs },
     90	{ .compatible = "fsl,lx2160a-flexspi-clk", .data = &lx2160a_flexspi_divs },
     91	{}
     92};
     93MODULE_DEVICE_TABLE(of, fsl_flexspi_clk_dt_ids);
     94
     95static struct platform_driver fsl_flexspi_clk_driver = {
     96	.driver = {
     97		.name = "fsl-flexspi-clk",
     98		.of_match_table = fsl_flexspi_clk_dt_ids,
     99	},
    100	.probe = fsl_flexspi_clk_probe,
    101};
    102module_platform_driver(fsl_flexspi_clk_driver);
    103
    104MODULE_DESCRIPTION("FlexSPI clock driver for Layerscape SoCs");
    105MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
    106MODULE_LICENSE("GPL");