cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pm.c (999B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (C) 2019 Paul Cercueil <paul@crapouillou.net>
      4 */
      5
      6#include "cgu.h"
      7#include "pm.h"
      8
      9#include <linux/io.h>
     10#include <linux/syscore_ops.h>
     11
     12#define CGU_REG_LCR		0x04
     13
     14#define LCR_LOW_POWER_MODE	BIT(0)
     15
     16static void __iomem * __maybe_unused ingenic_cgu_base;
     17
     18static int __maybe_unused ingenic_cgu_pm_suspend(void)
     19{
     20	u32 val = readl(ingenic_cgu_base + CGU_REG_LCR);
     21
     22	writel(val | LCR_LOW_POWER_MODE, ingenic_cgu_base + CGU_REG_LCR);
     23
     24	return 0;
     25}
     26
     27static void __maybe_unused ingenic_cgu_pm_resume(void)
     28{
     29	u32 val = readl(ingenic_cgu_base + CGU_REG_LCR);
     30
     31	writel(val & ~LCR_LOW_POWER_MODE, ingenic_cgu_base + CGU_REG_LCR);
     32}
     33
     34static struct syscore_ops __maybe_unused ingenic_cgu_pm_ops = {
     35	.suspend = ingenic_cgu_pm_suspend,
     36	.resume = ingenic_cgu_pm_resume,
     37};
     38
     39void ingenic_cgu_register_syscore_ops(struct ingenic_cgu *cgu)
     40{
     41	if (IS_ENABLED(CONFIG_PM_SLEEP)) {
     42		ingenic_cgu_base = cgu->base;
     43		register_syscore_ops(&ingenic_cgu_pm_ops);
     44	}
     45}