cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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clk-mt6779-cam.c (2076B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (c) 2019 MediaTek Inc.
      4 * Author: Wendell Lin <wendell.lin@mediatek.com>
      5 */
      6
      7#include <linux/module.h>
      8#include <linux/clk-provider.h>
      9#include <linux/platform_device.h>
     10#include <dt-bindings/clock/mt6779-clk.h>
     11
     12#include "clk-mtk.h"
     13#include "clk-gate.h"
     14
     15static const struct mtk_gate_regs cam_cg_regs = {
     16	.set_ofs = 0x0004,
     17	.clr_ofs = 0x0008,
     18	.sta_ofs = 0x0000,
     19};
     20
     21#define GATE_CAM(_id, _name, _parent, _shift)			\
     22	GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift,	\
     23		&mtk_clk_gate_ops_setclr)
     24
     25static const struct mtk_gate cam_clks[] = {
     26	GATE_CAM(CLK_CAM_LARB10, "camsys_larb10", "cam_sel", 0),
     27	GATE_CAM(CLK_CAM_DFP_VAD, "camsys_dfp_vad", "cam_sel", 1),
     28	GATE_CAM(CLK_CAM_LARB11, "camsys_larb11", "cam_sel", 2),
     29	GATE_CAM(CLK_CAM_LARB9, "camsys_larb9", "cam_sel", 3),
     30	GATE_CAM(CLK_CAM_CAM, "camsys_cam", "cam_sel", 6),
     31	GATE_CAM(CLK_CAM_CAMTG, "camsys_camtg", "cam_sel", 7),
     32	GATE_CAM(CLK_CAM_SENINF, "camsys_seninf", "cam_sel", 8),
     33	GATE_CAM(CLK_CAM_CAMSV0, "camsys_camsv0", "cam_sel", 9),
     34	GATE_CAM(CLK_CAM_CAMSV1, "camsys_camsv1", "cam_sel", 10),
     35	GATE_CAM(CLK_CAM_CAMSV2, "camsys_camsv2", "cam_sel", 11),
     36	GATE_CAM(CLK_CAM_CAMSV3, "camsys_camsv3", "cam_sel", 12),
     37	GATE_CAM(CLK_CAM_CCU, "camsys_ccu", "cam_sel", 13),
     38	GATE_CAM(CLK_CAM_FAKE_ENG, "camsys_fake_eng", "cam_sel", 14),
     39};
     40
     41static const struct of_device_id of_match_clk_mt6779_cam[] = {
     42	{ .compatible = "mediatek,mt6779-camsys", },
     43	{}
     44};
     45
     46static int clk_mt6779_cam_probe(struct platform_device *pdev)
     47{
     48	struct clk_hw_onecell_data *clk_data;
     49	struct device_node *node = pdev->dev.of_node;
     50
     51	clk_data = mtk_alloc_clk_data(CLK_CAM_NR_CLK);
     52
     53	mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks),
     54			       clk_data);
     55
     56	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
     57}
     58
     59static struct platform_driver clk_mt6779_cam_drv = {
     60	.probe = clk_mt6779_cam_probe,
     61	.driver = {
     62		.name = "clk-mt6779-cam",
     63		.of_match_table = of_match_clk_mt6779_cam,
     64	},
     65};
     66
     67module_platform_driver(clk_mt6779_cam_drv);
     68MODULE_LICENSE("GPL");