clk-mt6779-vdec.c (1763B)
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019 MediaTek Inc. 4 * Author: Wendell Lin <wendell.lin@mediatek.com> 5 */ 6 7#include <linux/module.h> 8#include <linux/clk-provider.h> 9#include <linux/platform_device.h> 10 11#include "clk-mtk.h" 12#include "clk-gate.h" 13 14#include <dt-bindings/clock/mt6779-clk.h> 15 16static const struct mtk_gate_regs vdec0_cg_regs = { 17 .set_ofs = 0x0000, 18 .clr_ofs = 0x0004, 19 .sta_ofs = 0x0000, 20}; 21 22static const struct mtk_gate_regs vdec1_cg_regs = { 23 .set_ofs = 0x0008, 24 .clr_ofs = 0x000c, 25 .sta_ofs = 0x0008, 26}; 27 28#define GATE_VDEC0_I(_id, _name, _parent, _shift) \ 29 GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, \ 30 &mtk_clk_gate_ops_setclr_inv) 31#define GATE_VDEC1_I(_id, _name, _parent, _shift) \ 32 GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, \ 33 &mtk_clk_gate_ops_setclr_inv) 34 35static const struct mtk_gate vdec_clks[] = { 36 /* VDEC0 */ 37 GATE_VDEC0_I(CLK_VDEC_VDEC, "vdec_cken", "vdec_sel", 0), 38 /* VDEC1 */ 39 GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1_cken", "vdec_sel", 0), 40}; 41 42static const struct of_device_id of_match_clk_mt6779_vdec[] = { 43 { .compatible = "mediatek,mt6779-vdecsys", }, 44 {} 45}; 46 47static int clk_mt6779_vdec_probe(struct platform_device *pdev) 48{ 49 struct clk_hw_onecell_data *clk_data; 50 struct device_node *node = pdev->dev.of_node; 51 52 clk_data = mtk_alloc_clk_data(CLK_VDEC_GCON_NR_CLK); 53 54 mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), 55 clk_data); 56 57 return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); 58} 59 60static struct platform_driver clk_mt6779_vdec_drv = { 61 .probe = clk_mt6779_vdec_probe, 62 .driver = { 63 .name = "clk-mt6779-vdec", 64 .of_match_table = of_match_clk_mt6779_vdec, 65 }, 66}; 67 68module_platform_driver(clk_mt6779_vdec_drv); 69MODULE_LICENSE("GPL");