cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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clk-mt8186-cam.c (2776B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2//
      3// Copyright (c) 2022 MediaTek Inc.
      4// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
      5
      6#include <linux/clk-provider.h>
      7#include <linux/platform_device.h>
      8#include <dt-bindings/clock/mt8186-clk.h>
      9
     10#include "clk-gate.h"
     11#include "clk-mtk.h"
     12
     13static const struct mtk_gate_regs cam_cg_regs = {
     14	.set_ofs = 0x4,
     15	.clr_ofs = 0x8,
     16	.sta_ofs = 0x0,
     17};
     18
     19#define GATE_CAM(_id, _name, _parent, _shift)			\
     20	GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
     21
     22static const struct mtk_gate cam_clks[] = {
     23	GATE_CAM(CLK_CAM_LARB13, "cam_larb13", "top_cam", 0),
     24	GATE_CAM(CLK_CAM_DFP_VAD, "cam_dfp_vad", "top_cam", 1),
     25	GATE_CAM(CLK_CAM_LARB14, "cam_larb14", "top_cam", 2),
     26	GATE_CAM(CLK_CAM, "cam", "top_cam", 6),
     27	GATE_CAM(CLK_CAMTG, "camtg", "top_cam", 7),
     28	GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "top_cam", 8),
     29	GATE_CAM(CLK_CAMSV1, "camsv1", "top_cam", 10),
     30	GATE_CAM(CLK_CAMSV2, "camsv2", "top_cam", 11),
     31	GATE_CAM(CLK_CAMSV3, "camsv3", "top_cam", 12),
     32	GATE_CAM(CLK_CAM_CCU0, "cam_ccu0", "top_cam", 13),
     33	GATE_CAM(CLK_CAM_CCU1, "cam_ccu1", "top_cam", 14),
     34	GATE_CAM(CLK_CAM_MRAW0, "cam_mraw0", "top_cam", 15),
     35	GATE_CAM(CLK_CAM_FAKE_ENG, "cam_fake_eng", "top_cam", 17),
     36	GATE_CAM(CLK_CAM_CCU_GALS, "cam_ccu_gals", "top_cam", 18),
     37	GATE_CAM(CLK_CAM2MM_GALS, "cam2mm_gals", "top_cam", 19),
     38};
     39
     40static const struct mtk_gate cam_rawa_clks[] = {
     41	GATE_CAM(CLK_CAM_RAWA_LARBX_RAWA, "cam_rawa_larbx_rawa", "top_cam", 0),
     42	GATE_CAM(CLK_CAM_RAWA, "cam_rawa", "top_cam", 1),
     43	GATE_CAM(CLK_CAM_RAWA_CAMTG_RAWA, "cam_rawa_camtg_rawa", "top_cam", 2),
     44};
     45
     46static const struct mtk_gate cam_rawb_clks[] = {
     47	GATE_CAM(CLK_CAM_RAWB_LARBX_RAWB, "cam_rawb_larbx_rawb", "top_cam", 0),
     48	GATE_CAM(CLK_CAM_RAWB, "cam_rawb", "top_cam", 1),
     49	GATE_CAM(CLK_CAM_RAWB_CAMTG_RAWB, "cam_rawb_camtg_rawb", "top_cam", 2),
     50};
     51
     52static const struct mtk_clk_desc cam_desc = {
     53	.clks = cam_clks,
     54	.num_clks = ARRAY_SIZE(cam_clks),
     55};
     56
     57static const struct mtk_clk_desc cam_rawa_desc = {
     58	.clks = cam_rawa_clks,
     59	.num_clks = ARRAY_SIZE(cam_rawa_clks),
     60};
     61
     62static const struct mtk_clk_desc cam_rawb_desc = {
     63	.clks = cam_rawb_clks,
     64	.num_clks = ARRAY_SIZE(cam_rawb_clks),
     65};
     66
     67static const struct of_device_id of_match_clk_mt8186_cam[] = {
     68	{
     69		.compatible = "mediatek,mt8186-camsys",
     70		.data = &cam_desc,
     71	}, {
     72		.compatible = "mediatek,mt8186-camsys_rawa",
     73		.data = &cam_rawa_desc,
     74	}, {
     75		.compatible = "mediatek,mt8186-camsys_rawb",
     76		.data = &cam_rawb_desc,
     77	}, {
     78		/* sentinel */
     79	}
     80};
     81
     82static struct platform_driver clk_mt8186_cam_drv = {
     83	.probe = mtk_clk_simple_probe,
     84	.remove = mtk_clk_simple_remove,
     85	.driver = {
     86		.name = "clk-mt8186-cam",
     87		.of_match_table = of_match_clk_mt8186_cam,
     88	},
     89};
     90builtin_platform_driver(clk_mt8186_cam_drv);